參數(shù)資料
型號(hào): HIP6311ACBZ
廠商: INTERSIL CORP
元件分類(lèi): 穩(wěn)壓器
英文描述: Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller
中文描述: SWITCHING CONTROLLER, 1500 kHz SWITCHING FREQ-MAX, PDSO20
封裝: LEAD FREE, PLASTIC, MS-013-AC, SOIC-20
文件頁(yè)數(shù): 8/16頁(yè)
文件大?。?/td> 449K
代理商: HIP6311ACBZ
8
current, the signal applied via the summing Correction circuit
to the Comparator, reduces the output pulse width of the
Comparator to compensate for the detected “above average”
current in that channel.
Droop Compensation
In addition to control of each power channel’s output current,
the average channel current is also used to provide CORE
voltage “droop” compensation. Average full channel current
is defined as 50
μ
A. By selecting an input resistor, R
IN
, the
amount of voltage droop required at full load current can be
programmed. The average current driven into the FB pin
results in a voltage increase across resistor R
IN
that is in the
direction to make the Error Amplifier “see” a higher voltage at
the inverting input, resulting in the Error Amplifier adjusting
the output voltage lower. The voltage developed across R
IN
is equal to the “droop” voltage. See the “Current Sensing and
Balancing” section for more details.
Applications and Convertor Start-Up
Each PWM power channel’s current is regulated. This
enables the PWM channels to accurately share the load
current for enhanced reliability. The HIP6601, HIP6602 or
HIP6603 MOSFET driver interfaces with the HIP6311A. For
more information, see the HIP6601, HIP6602 or HIP6603
data sheets.
The HIP6311A is capable of controlling up to 4 PWM power
channels. Connecting unused PWM outputs to V
CC
automatically sets the number of channels. The phase
relationship between the channels is 360
o
/number of active
PWM channels. For example, for three channel operation,
the PWM outputs are separated by 120
o
. Figure 2 shows the
PWM output signals for a four channel system.
Power supply ripple frequency is determined by the channel
frequency, F
SW
, multiplied by the number of active channels.
For example, if the channel frequency is set to 250kHz and
there are three phases, the ripple frequency is 750kHz.
The IC monitors and precisely regulates the CORE voltage
of a microprocessor. After initial start-up, the controller also
provides protection for the load and the power supply. The
following section discusses these features.
Initialization
The HIP6311A usually operates from an ATX power supply.
Many functions are initiated by the rising supply voltage to the
V
CC
pin of the HIP6311A. Oscillator, Sawtooth Generator, Soft-
Start and other functions are initialized during this interval.
These circuits are controlled by POR, Power-On Reset. During
this interval, the PWM outputs are driven to a three state
condition that makes these outputs essentially open. This state
results in no gate drive to the output MOSFETs.
Once the V
CC
voltage reaches 4.375V (+125mV), a voltage
level to insure proper internal function, the PWM outputs are
enabled and the Soft-Start sequence is initiated. If for any
reason, the V
CC
voltage drops below 3.875V (+125mV). the
POR circuit shuts the converter down and again three states
the PWM outputs.
Soft-Start
After the POR function is completed with V
CC
reaching
4.375V, the Soft-Start sequence is initiated. Soft-Start, by its
slow rise in CORE voltage from zero, avoids an over-current
condition by slowly charging the discharged output
capacitors. This voltage rise is initiated by an internal DAC
that slowly raises the reference voltage to the error amplifier
input. The voltage rise is controlled by the oscillator
frequency and the DAC within the HIP6311A, therefore, the
output voltage is effectively regulated as it rises to the final
programmed CORE voltage value.
For the first 32 PWM switching cycles, the DAC output
remains inhibited and the PWM outputs remain three stated.
From the 33rd cycle and for another, approximately 150 cycles
the PWM output remains low, clamping the lower output
MOSFETs to ground, see Figure 3. The time variability is due
to the Error Amplifier, Sawtooth Generator and Comparators
moving into their active regions. After this short interval, the
PWM outputs are enabled and increment the PWM pulse
width from zero duty cycle to operational pulse width, thus
allowing the output voltage to slowly reach the CORE voltage.
The CORE voltage will reach its programmed value before the
2048 cycles, but the PGOOD output will not be initiated until
the 2048th PWM switching cycle.
The Soft-Start time or delay time, DT = 2048/F
SW
. For an
oscillator frequency, F
SW
, of 200kHz, the first 32 cycles or
160
μ
s, the PWM outputs are held in a three state level as
explained above. After this period and a short interval
described above, the PWM outputs are initiated and the
voltage rises in 10.08ms, for a total delay time DT of
10.24ms.
PWM 1
PWM 2
PWM 3
PWM 4
FIGURE 2. FOUR PHASE PWM OUTPUT AT 500kHz
HIP6311A
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HIP6311ACBZ-T 功能描述:電流型 PWM 控制器 C4AM MULTI-PHS CONTR VID LVLS 5% AC RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)頻率:27 KHz 上升時(shí)間: 下降時(shí)間: 工作電源電壓:6 V to 15 V 工作電源電流:1.5 mA 輸出端數(shù)量:1 最大工作溫度:+ 105 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSSOP-14
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