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參數(shù)資料
| 型號： | HIP6201CB |
| 廠商： | INTERSIL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Transient Voltage Regulator DeCAPitator⑩ |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO8 |
| 封裝： | PLASTIC, MS-012-AA, SOIC-8 |
| 文件頁數(shù)： | 7/9頁 |
| 文件大?。?/td> | 87K |
| 代理商： | HIP6201CB |
2-447
L
OUT
= output inductor value
I
STEP
= transient current step amplitude
The value of the capacitor at the CAP pin should be sized so
that the HIP6200 can be active in response to a transient for
longer than the greater of T
R1
and T
R2
. For a 12V to 1.7V
DC-DC converter with a 3
μ
H inductor and a 8A maximum
transient step size, T
R1
= 2.3
μ
s and T
R2
= 14.1
μ
s. Thus, the
CAP capacitor should be chosen for the worst-case T
R2
response. Though the HIP6200 will be active for longer than
necessary in response to the low-to-high load transient, the
amount of power wasted will be minimal. The upper amplifier
will be active, drawing about 15mA, but the power npn
darlington will pinch off after the inductor current slews up.
The following section details power dissipation further.
Thermal Considerations
HIP6200 Power Dissipation
The power dissipated by the DeCAPitator is a function of
many variables. The load transient step size (I
STEP
), the
frequency of the transient events (1/T
TRAN
), and the
converter response time (T
R1
, T
R2
) have the largest
influence. Figure 3 displays these terms.
Based on some simplifying assumptions, the DeCAPitator
power dissipation can be approximated as follows:
where:
and:
I
IDLE
= nominal supply current when HIP6200 is powered
and amplifiers are not active (300
μ
A typical)
Ibias
UP
= upper amplifier bias current when active (15mA
typical)
Ibias
DWN
= lower amplifier bias current when active (30mA
typical)
t
ACTIVE
= time amplifiers are active. This time is set by CAP
capacitor and should be at least as long as T
R2
.
The bias power is a very small percentage of the total chip
power dissipation, but is included for completeness.
Based on these equations, the two figures below show how
the power dissipation varies with the transient frequency
(1/T
TRAN
), step load change (I
STEP
), and converter
response time (T
R1
, T
R2
). Both figures assume V
IN
= 12V
and V
OUT
= 1.7V. Figure 4 assumes a 3
μ
H output inductor
and varies the step size (as well as the transient frequency).
As mentioned in the previous section, these conditions give
T
R1
= 2.3
μ
s and T
R2
= 14.1
μ
s for I
STEP
= 8A. Figure 5
holds I
STEP
constant at 8A and varies the response time.
The converter response time often differs from the ideal
(Equations 1 and 2) substantially and therefore should be
verified experimentally.
Figures 4 and 5 show the relationships between the
DeCAPitator power dissipation and the load transient
frequency, load transient step size and the converter
response time. The power dissipation is linear with the
transient frequency but is shown on the log scale to
emphasize the fact that the HIP6200/1 power is minimal at
frequencies below a few hundred Hertz.
FIGURE 3. IDEALIZED WAVEFORMS OF DeCAPitator
OPERATION
I
OUT
T
R1
T
R2
I
CPU
T
TRAN
I
STEP
P
DISS
P
BIAS
P
UP
P
DWN
+
+
=
(EQ. 3)
P
UP
V
CC
V
OUT
–
(
)
I
----------------
T
TRAN
------------------
=
(EQ. 4)
P
DWN
V
OUT
(
)
I
----------------
T
TRAN
------------------
=
(EQ. 5)
P
BIAS
V
CC
I
BIAS
(
)
=
(EQ. 6)
I
BIAS
I
IDLE
Ibias
--------------------------------------------------
t
TRAN
Ibias
--------------------------------------------------------
t
TRAN
+
+
=
(EQ. 7)
FIGURE 4. ESTIMATED HIP6200, HIP6201 POWER
DISSIPATION vs I
STEP
TRANSIENT FREQUENCY (Hz)
10
2
10
3
10
4
10
5
P
0.1
0.2
0.3
0.4
0.5
0.6
I
STEP
= 8A
I
STEP
= 4A
I
STEP
= 6A
HIP6200, HIP6201
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