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參數(shù)資料
| 型號(hào)： | HIP6020A |
| 廠商： | Intersil Corporation |
| 元件分類(lèi)： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Advanced Dual PWM and Dual Linear Power Controller |
| 中文描述： | 先進(jìn)的雙PWM和線性雙電源控制器 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大?。?/td> | 192K |
| 代理商： | HIP6020A |
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4-9
Resistors (R
OCSET1
and R
OCSET2
) program the over-current
trip levels for each PWM converter. As shown in Figure 9, the
internal200
μ
Acurrentsink(I
OCSET
)developsavoltageacross
R
OCSET
(V
SET
) that is referenced to V
IN
. The DRIVE signal
enables the over-current comparator (OVER-CURRENT1 or
OVER-CURRENT2). When the voltage across the upper
MOSFET (V
DS(ON)
) exceeds V
SET
, the over-current
comparator trips to set the over-current latch. Both V
SET
and
V
DS
are referenced to V
IN
and a small capacitor across
R
OCSET
helps V
OCSET
track the variations of V
IN
due to
MOSFET switching. The over-current function will trip at a peak
inductor current (I
PEAK)
determined by:
The OC trip point varies with MOSFET’s r
DS(ON)
temperature variations. To avoid over-current tripping in the
normal operating load range, determine the ROCSET
resistor value from the equation above with:
1. The maximum r
DS(ON)
at the highest junction temperature
2. The minimum I
OCSET
from the specification table
3. Determine I
PEAK
for I
PEAK
> I
OUT(MAX)
+ (
I)/2,
where
I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
OUT1 Voltage Program
The output voltage of the PWM1 converter is programmed to
discrete levels between 1.3V
DC
and 3.5V
DC
. This output
(OUT1) is designed to supply the core voltage of Intel’s
advanced microprocessors. The voltage identification (VID)
pins program an internal voltage reference (DACOUT) with a
TTL-compatible 5-bit digital-to-analog converter (DAC). The
level of DACOUT also sets the PGOOD and OVP thresholds.
Table 1 specifies the DACOUT voltage for the different
combinations of connections on the VID pins. The VID pins
can be left open for a logic 1 input, because they are internally
pulled up to an internal voltage of about 5V by a 10
μ
A current
source. Changing the VID inputs during operation is not
recommended and could toggle the PGOOD signal and
exercise the over-voltage protection.
OUT2 Voltage Selection
The AGP regulator output voltage is internally set to 1.5V or
continuously on, based on the status of the SELECT pin.
SELECT pin is internally pulled ‘high’, such that left open,
the standard buck MOSFET will be continuously on, V
OUT2
being equal to the input voltage (3.3V) less any voltage drop
across the MOSFET’s r
DS(ON)
and output inductor’s DCR.
The other setting available is 1.5V, which can be obtained by
grounding the SELECT pin using a jumper or another
suitable method capable of sinking a few tens of
microamperes. The status of the SELECT pin cannot be
changed during operation of the IC without possibly causing
a fault condition.
FIGURE 6. OVER-CURRENT DETECTION
UGATE
OCSET
PHASE
OVER-
CURRENT
+
-
GATE
CONTROL
VCC
OC
200
μ
A
V
DS
i
D
V
SET
R
OCSET
V
IN
= +5V
OVER-CURRENT TRIP:
VDS
I
OCSET
+
+
PWM
DRIVE
iD
rDS ON
(
)
×
IOCSET
ROCSET
×
>
VSET
>
VPHASE
VOCSET
VIN
VIN
VDS
VSET
–
=
–
=
I
PEAK
=
I
---------------------------------------------------
R
×
DS ON
)
TABLE 1. OUT1 VOLTAGE PROGRAM
PIN NAME
NOMINAL
DACOUT
VOLTAGE
VID4
VID3
VID2
VID1
VID0
0
1
1
1
1
1.30
0
1
1
1
0
1.35
0
1
1
0
1
1.40
0
1
1
0
0
1.45
0
1
0
1
1
1.50
0
1
0
1
0
1.55
0
1
0
0
1
1.60
0
1
0
0
0
1.65
0
0
1
1
1
1.70
0
0
1
1
0
1.75
0
0
1
0
1
1.80
0
0
1
0
0
1.85
0
0
0
1
1
1.90
0
0
0
1
0
1.95
0
0
0
0
1
2.00
0
0
0
0
0
2.05
1
1
1
1
1
2.00
1
1
1
1
0
2.1
1
1
1
0
1
2.2
1
1
1
0
0
2.3
1
1
0
1
1
2.4
1
1
0
1
0
2.5
1
1
0
0
1
2.6
1
1
0
0
0
2.7
1
0
1
1
1
2.8
1
0
1
1
0
2.9
HIP6020A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HIP6020ACB | Advanced Dual PWM and Dual Linear Power Controller |
| HIP6020EVAL1 | Advanced Dual PWM and Dual Linear Power Controller |
| HIP6020 | FPGA - 100000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN |
| HIP6020CB | Advanced Dual PWM and Dual Linear Power Controller |
| HIP6301VCBZ-T | 100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HIP6020A_01 | 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:Advanced Dual PWM and Dual Linear Power Controller |
| HIP6020ACB | 制造商:Intersil Corporation 功能描述: |
| HIP6020ACB WAF | 制造商:Harris Corporation 功能描述: |
| HIP6020ACB-T | 制造商:Rochester Electronics LLC 功能描述:DUAL PWM AND 2 LINEAR CONTROLLER W/O VID=11111 SHUTDOWN - Tape and Reel |
| HIP6020CB | 制造商:Rochester Electronics LLC 功能描述:DUAL PWM AND 2 LINEAR CONTROLLER - Bulk |
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