參數(shù)資料
型號: HIP6019
廠商: International Rectifier
英文描述: 5-BIT PROGRAMMABLE SYNCHRONOUS BUCK, NON-SYNCHRONOUS,ADJUSTABLE LDO AND 200mA ON-BOARD LDO
中文描述: 5位可編程同步降壓,非同步,可調(diào)LDO和200mA的板上穩(wěn)壓器
文件頁數(shù): 12/15頁
文件大?。?/td> 152K
代理商: HIP6019
2-263
settings above, and including 2.5V. This is accomplished by
inverting the triangle wave sent to PWM 2.
Component Selection Guidelines
Output Capacitor Selection
The output capacitors for each output have unique
requirements. In general the output capacitors should be
selected to meet the dynamic regulation requirements.
Additionally, the PWM converters require an output capacitor
to filter the current ripple. The linear regulator is internally
compensated and requires an output capacitor that meets
the stability requirements. The load transient for the
microprocessor core requires high quality capacitors to
supply the high slew rate (di/dt) current demands.
PWM Output Capacitors
Modern microprocessors produce transient load rates above
10A/ns. High frequency capacitors initially supply the transient
and slow the current load rate seen by the bulk capacitors.
The bulk filter capacitor values are generally determined by
the ESR (effective series resistance) and ESL (effective series
inductance) parameters rather than actual capacitance.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching regulator applications for the bulk capacitors. The
bulk capacitor’s ESR determines the output ripple voltage and
the initial voltage drop after a high slew-rate transient. An
aluminum electrolytic capacitor’s ESR value is related to the
case size with lower ESR available in larger case sizes.
However, the equivalent series inductance of these capacitors
increases with case size and can reduce the usefulness of the
capacitor to high slew-rate transient loading. Unfortunately,
ESL is not a specified parameter. Work with your capacitor
supplier and measure the capacitor’s impedance with
frequency to select suitable components. In most cases,
multiple electrolytic capacitors of small case size perform
better than a single large case capacitor. For a given transient
load magnitude, the output voltage transient response due to
the output capacitor characteristics can be approximated by
the following equation:
Linear Output Capacitors
The output capacitors for the linear regulator and the linear
controller provide dynamic load current. The linear controller
uses dominant pole compensation integrated in the error
amplifier and is insensitive to output capacitor selection.
Capacitor, C
OUT3
should be selected for transient load
regulation.
The output capacitor for the linear regulator provides loop
stability. The linear regulator (OUT4) requires an output
capacitor characteristic shown in Figure 13 The upper line
plots the 45 phase margin with 150mA load and the lower
line is the 45 phase margin limit with a 10mA load. Select a
C
OUT4
capacitor with characteristic between the two limits.
Output Inductor Selection
Each PWM converter requires an output inductor. The
output inductor is selected to meet the output voltage ripple
requirements and sets the converter’s response time to a
load transient. The inductor value determines the converter’s
ripple current and the ripple voltage is a function of the ripple
current. The ripple voltage and current are approximated by
the following equations:
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce
the converter’s response time to a load transient.
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
HIP6019 will provide either 0% or 100% duty cycle in response
to a load transient. The response time is the time interval
requiredtoslewtheinductorcurrentfromaninitialcurrentvalue
to the post-transient current level. During this interval the
difference between the inductor current and the transient
current level must be supplied by the output capacitors.
Minimizing the response time can minimize the output
capacitance required.
The response time to a transient is different for the
application of load and the removal of load. The following
V
TRAN
ESL
dI
--------------------
×
ESR
I
TRAN
×
+
=
10
1000
100
0.1
0.2
0.3
0.4
0.5
0.6
0.7
CAPACITANCE (
μ
F)
E
)
FIGURE 13. C
OUT4
OUTPUT CAPACITOR
STABLE
I
V
-------------------------------
V
O
S
V
IN
---------------
×
=
V
OUT
I
ESR
×
=
HIP6019
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