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參數(shù)資料
| 型號： | HIP6019 |
| 廠商： | Intersil Corporation |
| 元件分類： | FPGA |
| 英文描述： | FPGA - 100000 SYSTEM GATE 2.5 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 先進的雙PWM和線性雙電源控制 |
| 文件頁數(shù)： | 11/15頁 |
| 文件大?。?/td> | 152K |
| 代理商： | HIP6019 |
2-262
The modulator transfer function is the small-signal transfer
function of V
OUT
/V
E/A
. This function is dominated by a DC
gain and the output filter, with a double pole break frequency
at F
LC
and a zero at F
ESR
. The DC gain of the modulator is
simply the input voltage, V
IN
, divided by the peak-to-peak
oscillator voltage,
V
OSC
.
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
internal to the HIP6019 and the impedance networks Z
IN
and Z
FB
. The goal of the compensation network is to
provide a closed loop transfer function with an acceptable
0dB crossing frequency (f
0dB
) and adequate phase margin.
Phase margin is the difference between the closed loop
phase at f
0dB
and 180 degrees
.
The equations below relate
the compensation network’s poles, zeros and gain to the
components (R1, R2, R3, C1, C2, and C3) in Figure 11.
Use these guidelines for locating the poles and zeros of the
compensation network:
1. Pick Gain (R2/R1) for desired converter bandwidth.
2. Place 1
ST
Zero below filter’s Double Pole (~75% F
LC
).
3. Place 2
ND
Zero at filter’s Double Pole.
4. Place 1
ST
Pole at the ESR Zero.
5. Place 2
ND
Pole at half the switching frequency.
6. Check Gain against Error Amplifier’s Open-Loop Gain.
7. Estimate Phase Margin - repeat if necessary.
Compensation Break Frequency Equations
Figure 12 shows an asymptotic plot of the DC-DC
converter’s gain vs frequency. The actual modulator gain has
a peak due to the high Q factor of the output filter at F
LC
,
which is not shown in Figure 12. Using the above guidelines
should yield a compensation gain similar to the curve
plotted. The open loop error amplifier gain bounds the
compensation gain. Check the compensation gain at F
P2
with the capabilities of the error amplifier. The closed loop
gain is constructed on the log-log graph of Figure 12 by
adding the modulator gain (in dB) to the compensation gain
(in dB). This is equivalent to multiplying the modulator
transfer function to the compensation transfer function and
plotting the gain.
The compensation gain uses external impedance networks
Z
FB
and Z
IN
to provide a stable, high bandwidth loop. A
stable control loop has a 0dB gain crossing with
-20dB/decade slope and a phase margin greater than 45
degrees. Include worst case component variations when
determining phase margin.
Oscillator Synchronization
The PWM controllers use a triangle wave for comparison with
the error amplifier output to provide a pulse-width modulated
wave. Should the output voltages of the two PWM converters
be programmed close to each other, then cross-talk could
cause nonuniform PHASE pulse-widths and increased output
voltage ripple. The HIP6019 avoids this problem by
synchronizing the two converters 180
°
out-of-phase for DAC
FIGURE 11. VOLTAGE-MODE BUCK CONVERTER COMPEN-
SATION DESIGN
V
OUT
OSC
REFERENCE
L
O
C
O
ESR
V
IN
V
OSC
ERROR
AMP
PWM
COMP
-
DRIVER
(PARASITIC)
Z
FB
+
-
REFERENCE
R1
R3
R2
C3
C2
C1
COMP
V
OUT
FB
Z
FB
HIP6019
Z
IN
DRIVER
DETAILED FEEDBACK COMPENSATION
PHASE
V
E/A
+
+
-
Z
IN
F
LC
L
O
2
π
C
O
×
×
---------------------------------------
=
F
ESR
O
-----------------------------------------
=
F
Z1
-----------------------------------
=
F
Z2
R3
)
C3
×
------------------------+
=
F
P1
2
π
R
2
--------+
×
×
------------------------------------------------------
=
F
P2
-----------------------------------
=
100
80
60
40
20
0
-20
-40
-60
F
P1
F
Z2
10M
1M
100K
10K
1K
100
10
OPEN LOOP
ERROR AMP GAIN
F
Z1
F
P2
20LOG
(R
2
/R
1
)
F
LC
F
ESR
COMPENSATION
GAIN
G
FREQUENCY (Hz)
20LOG
(V
IN
/
V
OSC
)
MODULATOR
GAIN
FIGURE 12. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
CLOSED LOOP
GAIN
HIP6019
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| HIP6019BCB | 功能描述:IC REG QD BCK/LINEAR 28-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 + 切換式 系列:- 標準包裝:2,500 系列:- 拓撲:降壓（降壓）同步（3），線性（LDO）（2） 功能:任何功能 輸出數(shù):5 頻率 - 開關(guān):300kHz 電壓/電流 - 輸出 1:控制器 電壓/電流 - 輸出 2:控制器 電壓/電流 - 輸出 3:控制器 帶 LED 驅(qū)動器:無 帶監(jiān)控器:無 帶序列發(fā)生器:是 電源電壓:5.6 V ~ 24 V 工作溫度:-40°C ~ 85°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| HIP6019BCB-T | 功能描述:IC REG QD BCK/LINEAR 28-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 + 切換式 系列:- 標準包裝:2,500 系列:- 拓撲:降壓（降壓）同步（3），線性（LDO）（2） 功能:任何功能 輸出數(shù):5 頻率 - 開關(guān):300kHz 電壓/電流 - 輸出 1:控制器 電壓/電流 - 輸出 2:控制器 電壓/電流 - 輸出 3:控制器 帶 LED 驅(qū)動器:無 帶監(jiān)控器:無 帶序列發(fā)生器:是 電源電壓:5.6 V ~ 24 V 工作溫度:-40°C ~ 85°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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