參數(shù)資料
型號(hào)： HIP6011
廠商： HARRIS SEMICONDUCTOR
元件分類： 穩(wěn)壓器
英文描述： Buck Pulse-Width Modulator (PWM) Controller and Output Voltage Monitor
中文描述： SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO14
文件頁(yè)數(shù)： 6/9頁(yè)
文件大小： 89K
代理商： HIP6011
6
2) The minimum I
OCSET
from the specification table.
3) Determine I
PEAK
for
where
I is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled ‘Output Inductor Selection’.
,
A small ceramic capacitor should be placed in parallel with
R
OCSET
to smooth the voltage across R
OCSET
in the
presence of switching noise on the input voltage.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the imped-
ances of the interconnecting bond wires and circuit traces.
These interconnecting impedances should be minimized by
using wide, short printed circuit traces. The critical compo-
nents should be located as close together as possible using
ground plane construction or single point grounding.
Figure 5 shows the critical power components of the
converter. To minimize the voltage overshoot the intercon-
necting wires indicated by heavy lines should be part of
ground or power plane in a printed circuit board. The compo-
nents shown in Figure 6 should be located as close together
as possible. Please note that the capacitors C
IN
and C
O
each represent numerous physical capacitors. Locate the
HIP6011 within 3 inches of the MOSFET, Q1. The circuit
traces for the MOSFET’s gate and source connections from
the HIP6011 must be sized to handle up to 1A peak current.
Figure 6 shows the circuit traces that require additional
layout consideration. Use single point and ground plane con-
struction for the circuits shown. Minimize any leakage cur-
rent paths on the SS PIN and locate the capacitor, C
ss
close
to the SS pin because the internal current source is only
10
μ
A. Provide local VCC decoupling between VCC and
GND pins. Locate the capacitor, C
BOOT
as close as practical
to the Boot and PHASE pins.
Feedback Compensation
Figure 7 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
OUT
) is regulated to the Reference voltage level. The error
amplifier (Error Amp) output (V
E/A
) is compared with the oscil-
lator (OSC) triangular wave to provide a pulse-width modulated
(PWM) wave with an amplitude of V
IN
at the PHASE node. The
PWM wave is smoothed by the output filter (L
O
and C
O
).
The modulator transfer function is the small-signal transfer
function of V
OUT
/V
E/A
. This function is dominated by a DC
Gain and the output filter (L
O
and C
O
), with a double pole
break frequency at F
LC
and a zero at F
ESR
. The DC Gain of
the modulator is simply the input voltage (V
IN
) divided by the
peak-to-peak oscillator voltage
V
OSC
.
Modulator Break Frequency Equations
2
π
L
O
I
Iout max
)
I
(
)
2
+
>
L
O
C
O
UGATE
PHASE
Q1
D2
V
IN
V
OUT
RETURN
HIP6011
C
IN
L
FIGURE 5. PRINTED CIRCUIT BOARD POWER AND GROUND
PLANES OR ISLANDS
HIP6011
SS
GND
V+12V
BOOT
D1
L
O
C
O
V
OUT
L
Q1
D2
PHASE
+V
IN
C
BOOT
C
VCC
C
SS
FIGURE 6. PRINTED CIRCUIT BOARD SMALL SIGNAL
LAYOUT GUIDELINES
+
-
R1
R3
R2
C3
C2
C1
COMP
V
OUT
FB
Z
FB
HIP6011
Z
IN
DETAILED COMPENSATION COMPONENTS
REF
V
OUT
-
+
+
-
OSC
REFERENCE
L
O
C
O
ESR
V
IN
V
OSC
ERROR
AMP
PWM
DRIVER
(PARASITIC)
Z
IN
Z
FB
COMPARATOR
PHASE
V
E/A
FIGURE 7. VOLTAGE - MODE BUCK CONVERTER
COMPENSATION DESIGN
LC =
C
O
--------------------------------------
F
ESR
=
O
)
--------------------------------------------
HIP6011
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