參數(shù)資料
型號: HIP6004ACB
廠商: HARRIS SEMICONDUCTOR
元件分類: 穩(wěn)壓器
英文描述: Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor
中文描述: SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO20
文件頁數(shù): 7/12頁
文件大?。?/td> 159K
代理商: HIP6004ACB
2-68
For an equation for the ripple current see the section under component guidelines titled ‘Output Inductor Selection’
.
A small ceramic capacitor should be placed in parallel with
R
OCSET
to smooth the voltage across R
OCSET
in the
presence of switching noise on the input voltage.
Output Voltage Program
The output voltage of a HIP6004A converter is
programmed to discrete levels between 1.8V
DC
and
3.5V
DC
. The voltage identification (VID) pins program an
internal voltage reference (DACOUT) with a TTL-
compatible 5-bit digital-to-analog converter (DAC). The
level of DACOUT also sets the PGOOD and OVP
thresholds. Table 1 specifies the DACOUT voltage for the
32 different combinations of connections on the VID pins.
The output voltage should not be adjusted while the
converter is delivering power. Remove input power before
changing the output voltage. Adjusting the output voltage
during operation could toggle the PGOOD signal and
exercise the overvoltage protection.
All VID pin combinations resulting in a 0V output setting
activate the Power-On Reset function, disable the gate drive
circuitry and output a 0 logic at PGOOD pin.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible, using ground plane construction or single point
grounding.
Figure 5 shows the critical power components of the
converter. To minimize the voltage overshoot the
interconnecting wires indicated by heavy lines should be
part of ground or power plane in a printed circuit board. The
components shown in Figure 5 should be located as close
TABLE 1. OUTPUT VOLTAGE PROGRAM
PIN NAME
NOMINAL OUTPUT
VOLTAGE DACOUT
PIN NAME
NOMINAL OUTPUT
VOLTAGE DACOUT
VID4
VID3
VID2
VID1
VID0
VID4
VID3
VID2
VID1
VID0
0
1
1
1
1
0
1
1
1
1
1
0
0
1
1
1
0
0
1
1
1
1
0
2.1
0
1
1
0
1
0
1
1
1
0
1
2.2
0
1
1
0
0
0
1
1
1
0
0
2.3
0
1
0
1
1
0
1
1
0
1
1
2.4
0
1
0
1
0
0
1
1
0
1
0
2.5
0
1
0
0
1
0
1
1
0
0
1
2.6
0
1
0
0
0
0
1
1
0
0
0
2.7
0
0
1
1
1
0
1
0
1
1
1
2.8
0
0
1
1
0
0
1
0
1
1
0
2.9
0
0
1
0
1
1.80
1
0
1
0
1
3.0
0
0
1
0
0
1.85
1
0
1
0
0
3.1
0
0
0
1
1
1.90
1
0
0
1
1
3.2
0
0
0
1
0
1.95
1
0
0
1
0
3.3
0
0
0
0
1
2.00
1
0
0
0
1
3.4
0
0
0
0
0
2.05
1
0
0
0
0
3.5
NOTE: 0 = connected to GND or V
SS
, 1 = connected to V
DD
through pull-up resistors.
PGND
L
O
C
O
LGATE
UGATE
PHASE
Q
1
Q
2
D
2
V
IN
V
OUT
RETURN
HIP6004A
C
IN
L
FIGURE 5. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
HIP6004A
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