參數(shù)資料
型號: HIP5063
廠商: Intersil Corporation
元件分類: FPGA
英文描述: FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN
中文描述: 電源控制IC單芯片電源
文件頁數(shù): 3/4頁
文件大小: 549K
代理商: HIP5063
3
Absolute Maximum Ratings
Thermal Information
DMOS Drain Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 60V
DMOS Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20A
DC Logic Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V
Output Voltage, Logic Outputs . . . . . . . . . . . . . . . . . . . -0.3V to 16V
Input Voltage, Analog and Logic. . . . . . . . . . . . . . . . . . -0.3V to 16V
Operating Junction Temperature Range . . . . . . . . . .0
o
C to +110
o
C
Storage Temperature Range . . . . . . . . . . . . . . . . . -55
o
C to +150
o
C
Thermal Resistance
(Solder Mounted to . . . . . . . . . . . . . . . . . . . . . . . . . 3
o
C/W Max
0.050” Thick Copper Heat Sink)
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . +110
o
C
(Controlled By Thermal Shutdown Circuit)
θ
JC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
V
DDA
= V
DDD
= V
DDP
= 12V, T
J
= 0
o
C to +110
o
C; Unless Otherwise Specified
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DEVICE PARAMETERS
I+
Supply Current
External Clock Input = 1MHz
-
14
-
mA
DMOS TRANSISTORS
r
DS(on)
Drain-Source On-State Resis-
tance
I Drain = 5A, T
J
= +25
o
C
-
-
0.13
I
DSS
Drain-Source Leakage Current
Drain to Source Voltage = 60V
-
1
100
μ
A
CURRENT CONTROLLED PWM
|V
IO
|
VCMP
Buffer Offset Voltage
(VCMP - V
IRFO
)
IRFO = 0mA to -5mA,
VCMP = 0.2V to 7.6V
-
-
125
mV
I
GAIN
I
PEAK
(DMOS
DRAIN
)/I
IRFI
I (DMOS
DRAIN
)/
t = 1A/ms
3.8
-
4.9
A/mA
R
IRFI
IRFI Resistance to GND
I
RFI
= 2mA
150
-
360
t
RS
Current Comparator Response
Time (Note 1)
I (DMOS
DRAIN
)/
t > 1A/ms
-
30
-
ns
MCPW
Minimum Controllable Pulse
Width (Note 1)
25
50
100
ns
MCPI
Minimum Controllable DMOS
Peak Current (Note 1)
200
400
800
mA
CLOCK
V
TH
CLCK
CLCK Input Threshold Voltage
4
-
8
V
V
TH
FLLN
FLLN Input Threshold Voltage
4
-
8
V
I
FLLN
FLLN Pull-Up Current
VFLLN = 0V
-70
-50
-30
μ
A
THERMAL MONITOR
TEMP
Substrate Temperature for
Thermal Monitor to Trip (Note 1)
TMON pin open
105
-
135
o
C
I
LEAK
COOL
COOL Leakage Current
V
COOL
= 12V
-
-
1
μ
A
V
COOL
COOL Low-State Voltage
I
COOL
= 2mA, T
J
> +125
o
C
-
-
0.4
V
NOTE:
1. Determined by design, not a measured parameter.
HIP5063
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