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參數(shù)資料
| 型號： | HIP5062DY |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | FPGA 1000000 SYSTEM GATE 1.8 VOLT - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 10 A DUAL SWITCHING CONTROLLER, 1100 kHz SWITCHING FREQ-MAX, UUC40 |
| 封裝： | DIE-40 |
| 文件頁數(shù)： | 7/7頁 |
| 文件大?。?/td> | 655K |
| 代理商： | HIP5062DY |
7
Functional Block Diagram
CONTROL
&
BLANKING
LOGIC
V
DDD
S
FLIP-FLOP
R
FAST RESET
Q
SOURCE
1
DRAIN
1
GATE
DRIVERS
S
FLIP-FLOP
R
FAST RESET
V
DDP2
Q
DRAIN
2
XCKS
CKIN
1 MHz
CLOCK
30K
V
DDD
V
DDA
BIAS
CIRCUITS
BAND GAP
REF
REG
12V
REG
VREF = 5.1V
IRFI2
LOW
-
+
VREF
98K
2K
LOW
LOAD
-
+
VREF 98K
2K
-
+
1
μ
A
50
μ
A
g
AMP
+
-
SLRN
VCMP2
VREG2
-
+
-
-
+
VREF
VREF
THERMAL
MONITOR
CIRCUIT
SHORT
OVER
VOLTAGE
SHRT
PSEN
DGND
AGND
SFST
VINP
TO
IFRO1
VREF
CURRENT
MONITOR-
ING AMP
900
12K
V
DDD
V
DDA
V
DDA
VCMP1
VTCN
IRFO1
IRFI1
V
DDP1
VREG1
V
DDA
POWER
SUPPLY
OK
V+
13.3K
13.3K
31.3K
11.3K
11.3K
TMON
PSOK
FLTN
gm SD
g
m
SD
VINP
IRF02
V+
MONITOR
MULTIPLEXER
GATE
DRIVERS
CONTROL
&
BLANKING
LOGIC
SOURCE
2
CURRENT
MONITOR-
ING AMP
SFST
gm
AMP
+
-
TO
VREG2
TO
45K
TO
SFST
TO
TO
+
-
HIP5062
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