參數(shù)資料
型號(hào): HIP1013CB
廠商: HARRIS SEMICONDUCTOR
元件分類: 穩(wěn)壓器
英文描述: 5000 SYSTEM GATE LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
中文描述: DUAL SWITCHING CONTROLLER, PDSO14
文件頁數(shù): 3/7頁
文件大?。?/td> 51K
代理商: HIP1013CB
2-408
Pin Description
PIN NO.
SYMBOL
FUNCTION
DESCRIPTION
1
12VS
12V Source
Connect to source of associated external N-Channel MOSFET switch to sense output
voltage.
2
12VG
12V Gate
Connect to the gate of associated N-Channel MOSFET switch. A capacitor from this
node to ground sets the turn-on ramp. At turn-on this capacitor will be charged to
17.4V
by a 10
μ
A current source when in 5V/12V mode of operation, otherwise capacitor will be
charged to
11.4V.
3
V
DD
Chip Supply
Connect to 12V supply. This can be either connected directly to the +12V rail supplying
the load voltage or to a dedicated V
DD
+12V supply.
4
MODE/
PWRON1
Power ON/ Reset invokes
3.3V operation when
shorted to V
DD
, Pin 3.
PWRON1 and PWRON2 are used to turn-on and reset the chip. Both outputs turn-on
when either pin is driven low. After an over current limit fault, the chip is reset by the rising
edge of a reset signal applied to either PWRON pin. Each input has 100
μ
A pull up
capability which is compatible with 3V and 5V open drain and standard logic. PWRON1
is also used to invoke 3.3V control operation in preference to +12V control. By tying pin
4 to pin 3 the charge pump is disabled and the UV threshold also shifts to
2.8V.
5
PWRON2
Power ON/Reset
6
5VG
5V Gate
Connect to the gate of the external 5V N-Channel MOSFET. A capacitor from this node
to ground sets the turn-on ramp. At turn-on this capacitor will be charged to
11.4V by a
10
μ
A current source.
7
5VS
5V Source
Connect to the source side of 5V external N-Channel MOSFET switch to sense output
voltage.
8
5VISEN
5V Current Sense
Connect to the load side of the 5V sense resistor to measure the voltage drop across this
resistor between 5VS and 5VISEN pins.
9
PGOOD
Power Good Indicator
PGOOD is driven by an open drain N-Channel MOSFET. It is pulled low when either
output voltage is not within specification or and OC condition exists.
10
No Connection.
11
C
PUMP
Charge Pump Capacitor
Connect a 0.1
μ
F capacitor between this pin and V
DD
(Pin 3).
12
GND
Chip Ground
13
R
ILIM
Current Limit Set Resistor
A resistor connected between this pin and ground determines the current level at which
current limit is activated. This current is determined by the ratio of the R
ILIM
resistor to
the sense resistor (R
SENSE
). The current at current limit onset is equal to
10
μ
A x (R
ILIM
/R
SENSE
).
14
12VISEN
12V Current Sense
Connect to the load side of sense resistor to measure the voltage drop across this
resistor.
HIP1013
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HIP1016CB 5000 SYSTEM GATE LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
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