參數(shù)資料
型號(hào)： HI5766
廠商： Intersil Corporation
英文描述： 10-Bit, 60 MSPS A/D Converter(10位、采樣速率為60MSPS的A/D轉(zhuǎn)換器)
中文描述： 10位，60 MSPS的的A / D轉(zhuǎn)換器（10位，采樣速率為60MSPS的的A / D轉(zhuǎn)換器）
文件頁(yè)數(shù)： 12/16頁(yè)
文件大?。?/td> 885K
代理商： HI5766
12
two-bit multiplying digital-to-analog converter, follow the S/H
circuit with the ninth stage being a two bit flash converter.
Each converter stage in the pipeline will be sampling in one
phase and amplifying in the other clock phase. Each
individual subconverter clock signal is offset by 180 degrees
from the previous stage clock signal resulting in alternate
stages in the pipeline performing the same operation.
The output of each of the eight identical two-bit subconverter
stages is a two-bit digital word containing a supplementary bit
to be used by the digital error correction logic. The output of
each subconverter stage is input to a digital delay line which is
controlled by the internal sampling clock. The function of the
digital delay line is to time align the digital outputs of the eight
identical two-bit subconverter stages with the corresponding
output of the ninth stage flash converter before applying the
eighteen bit result to the digital error correction logic. The
digital error correction logic uses the supplementary bits to
correct any error that may exist before generating the final
10-bit digital data output of the converter.
Because of the pipeline nature of this converter, the digital
data representing an analog input sample is output to the
digital data bus on the 7th cycle of the clock after the analog
sample is taken. This time delay is specified as the data
latency. After the data latency time, the digital data
representing each succeeding analog sample is output during
the following clock cycle. The digital output data is
synchronized to the external sampling clock by a double
buffered latching technique. The output of the digital error
correction circuit is available in two’s complement or offset
binary format depending on the state of the Data Format
Select (DFS) control input (see Table 1, A/D Code Table).
Reference Voltage Inputs, V
REF
- and V
REF
+
The HI5766 is designed to accept two external reference
voltage sources at the V
REF
input pins. Typical operation of
the converter requires V
REF
+ to be set at +2.5V and V
REF
- to
be set at 2.0V. However, it should be noted that the input
structure of the V
REF
+ and V
REF
- input pins consists of a
resistive voltage divider with one resistor of the divider
(nominally 500
) connected between V
REF
+ and V
REF
- and
the other resistor of the divider (nominally 2000
) connected
between V
REF
- and analog ground. This allows the user the
option of supplying only the +2.5V V
REF
+ voltage reference
with the +2.0V V
REF
- being generated internally by the
voltage division action of the input structure.
The HI5766 is tested with V
REF
- equal to +2.0V and V
REF
+
equal to +2.5V yielding a fully differential analog input voltage
range of
±
0.5V. V
REF
+ and V
REF
- can differ from the above
voltages.
In order to minimize overall converter noise it is
recommended that adequate high frequency decoupling be
provided at
both
of the reference voltage input pins, V
REF
+
and V
REF
-.
Analog Input, Differential Connection
The analog input to the HI5766 is a differential input that can
be configured in various ways depending on the signal
source and the required level of performance. A fully
differential connection (Figure 25 and Figure 26) will give the
best performance for the converter.
Since the HI5766 is powered by a single +5V analog supply,
the analog input is limited to be between ground and +5V.
For the differential input connection this implies the analog
input common mode voltage can range from 0.25V to 4.75V.
The performance of the ADC does not change significantly
with the value of the analog input common mode voltage.
A DC voltage source, V
DC
, equal to 3.2V (Typ), is made
available to the user to help simplify circuit design when using
an AC coupled differential input. This low output impedance
voltage source is not designed to be a reference but makes
an excellent DC bias source and stays well within the analog
input common mode voltage range over temperature.
For the AC coupled differential input (Figure 25) assume
the difference between V
REF
+, typically 2.5V, and V
REF
-,
typically 2V, is 0.5V. Full scale is achieved when the V
IN
and -V
IN
input signals are 0.5V
P- P
, with -V
IN
being
180 degrees out of phase with V
IN
. The converter will be
at positive full scale when the V
IN
+ input is at
V
DC
+ 0.25V and the V
IN
- input is at V
DC
- 0.25V (V
IN
+ -
V
IN
- = +0.5V). Conversely, the converter will be at
negative full scale when the V
IN
+ input is equal to V
DC
-
0.25V and V
IN
- is at V
DC
+ 0.25V (V
IN
+ - V
IN
- = -0.5V).
The analog input can be DC coupled (Figure 26) as long as
the inputs are within the analog input common mode voltage
range (0.25V
≤
VDC
≤
4.75V).
V
IN
+
V
DC
V
IN
-
HI5766
V
IN
-V
IN
R
R
FIGURE 25. AC COUPLED DIFFERENTIAL INPUT
V
IN
+
V
DC
V
IN
-
HI5766
V
IN
-
V
IN
R
R
C
VDC
VDC
FIGURE 26. DC COUPLED DIFFERENTIAL INPUT
HI5766
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參數(shù)描述
HI5766_05 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:10-Bit, 60MSPS A/D Converter
HI5766EVAL1 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:
HI5766KCA 功能描述:IC ADC 10-BIT 60MSPS 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:-
HI5766KCAZ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC A/D 10-BIT 60MSPS 28 SSOP COM TEMP RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
HI5766KCB 功能描述:CONV A/D 10BIT 60MSPS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:-
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