參數(shù)資料
型號： HI1172JCP
廠商： INTERSIL CORP
元件分類： ADC
英文描述： 6-Bit, 20 MSPS,Video A/D Converter (CMOS)
中文描述： 1-CH 6-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDIP16
封裝： PLASTIC, DIP-16
文件頁數(shù)： 4/7頁
文件大?。?/td> 60K
代理商： HI1172JCP
4-1065
Absolute Maximum Ratings
T
A
= 25
o
C
Thermal Information
Supply Voltage (V
DD
). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Reference Voltage (V
RT
, V
RB
). . . . . . . . . . . . . . . . . . . . V
DD
to V
SS
Analog Input Voltage (V
IN
) . . . . . . . . . . . . . . . . . . . . . . . V
DD
to V
SS
Digital Input Voltage (CLK) . . . . . . . . . . . . . . . . . . . . . . . V
DD
to V
SS
Digital Output Voltage (V
OH
, V
OL
) . . . . . . . . . . . . . . . . . V
DD
to V
SS
Operating Conditions
Supply Voltage Range, AV
DD
, AV
SS
. . . . . . . . . . . . 4.75V to 5.25V
Reference Voltage, DV
DD
, DV
SS
V
RT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.9V to 5V
V
RB
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 4.1V
V
RT
- V
RB
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.9V to AV
DD
Analog Input Voltage (V
IN
) . . . . . . . . . . . . . . . . . . . . . . . V
RB
to V
RT
Clock Pulse Width
t
PW1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns (Min)
t
PW0
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns (Min)
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -20
o
C to 75
o
C
Thermal Resistance (Typical, Note 1)
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
120
94
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
DD
= +5V, V
RB
= 1V, V
RT
= 2V, T
A
= 25
o
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Conversion Speed, f
C
f
C
V
IN
= 1V to 2V
f
IN
= 1kHz Ramp
0.5
-
20
MSPS
Integral Non-Linearity
E
L
f
C
= 20 MSPS
V
IN
= 1V to 2V
-
±
0.3
±
0.5
LSB
Differential Non-Linearity
E
D
f
C
= 20 MSPS
V
IN
= 1V to 2V
-
±
0.3
±
0.5
LSB
Supply Current
I
DD
f
C
= 20 MSPS
NTSC Ramp Wave Input
-
7
12
mA
Reference Pin Current
I
REF
3
4
5.7
mA
Analog Input (-1dB)
BW
-
18
-
MHz
Analog Input Capacitance
C
IN
V
IN
= 1.5V + 0.07V
RMS
-
4
-
pF
Reference Resistance (V
RT
to V
RB
)
R
REF
175
250
325
Offset Voltage
E
OT
0
-20
-40
mV
E
OB
15
35
55
mV
Digital Input Voltage
V
IH
4.0
-
-
V
V
IL
-
-
1.0
V
Digital Input Current
I
IH
V
DD
= Max
V
IH
= V
DD
-
-
5
μ
A
I
IL
V
IL
= 0V
-
-
5
μ
A
Digital Output Current
I
OH
V
DD
= Min
V
OH
= V
DD
= 0.5V
-1.1
-
-
mA
I
OL
V
OL
= 0.4V
3.7
-
-
mA
Output Data Delay
T
DL
With TTL 1 Gate and 10pF Load
-
18
30
ns
Differential Gain Error
DG
NTSC 40 IRE Mod
-
1.0
-
%
Differential Phase Error
DP
Ramp, f
C
= 14.3 MSPS
-
1.0
-
deg
Aperture Jitter
t
AJ
-
40
-
ps
Sampling Delay
t
SD
-
4
-
ns
HI1172
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