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參數(shù)資料
| 型號： | HI-8785PSI |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 512 MACROCELL 3.3 VOLT ZERO POWER ISP CP - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 1 CHANNEL(S), SERIAL COMM CONTROLLER, PDSO24 |
| 封裝： | PLASTIC, SOIC-24 |
| 文件頁數(shù)： | 2/9頁 |
| 文件大?。?/td> | 194K |
| 代理商： | HI-8785PSI |
HI-8783, HI-8784, HI-8785
PIN DESCRIPTIONS
The HI-8783 is a parallel to serial converter, which when
loaded with four eightbitparallelbytes,outputs the dataas
a32bitserialword.Timingcircuitryinsertsa4bitgapatthe
endofeach32bitword.Aninputbufferregisterallowsload
operations to take place while the previously loaded word
isbeingtransmitted.
If the PARITY ENB pin is high, the 32nd bit will be a parity
bit,insertedsoastomakethe32bitwordhaveoddparity.If
the PARITYENB pinis low,the32nd bit willbetheD7bitof
the4thbyte.
Outputs are provided for both ARINC 429/575 (DATA ONE
and DATA ZERO pins), and ARINC 561 (561 DATA and
561SYNCpins)typedata.
A lowsignal appliedtothe
internal logic so that spurious transmission does not take
place during power-up. The registers are cleared so that a
continuous gap will be transmitted until the first word is
loadedintothetransmitter.
pin resets the HI-8783’s
RESET
FUNCTIONAL DESCRIPTION
PIN
HI-8783 HIPIN
(20-pin) (22-pin)
PIN
SYMBOL
FUNCTION
DESCRIPTION
HI-8784
HI-8785
2
1
2
561 SYNC
Dn
GND
A0
SLP1.5
WRITE
RESET
digital output
digital inputs
power supply Ground
digital input
digital input
digital input
digital input
digital input
digital output
ARINC 561 Sync signal
Parallel 8 bit Data Input
3-10
11
12
-
13
14
15
16
17
-
18
19
-
-
20
-
2-8,10
11
12
-
14
15
16
17
18
-
19
20
-
-
21
-
3-9,11
12
13
14
15
16
17
18
19
20
-
-
21
22
23
24
Byte address, A0=1 for 1st byte, A0=0 for 2nd, 3rd & 4th bytes
Selects the slope of the line driver. High = 1.5us
Write strobe, loads data on rising edge
Registers and sequencing logic initialized when low
Clock input for the transmitter
Goes high if the buffer register is empty
When high the 32nd bit output is odd parity
power supply -10 volt rail
digital output
Goes high for each ARINC bit output that is a “one”
digital output
Goes high for each ARINC bit output that is a “zero”
analog output Line driver ouptut - A side
analog output Line driver output - B side
digital output
Serial output for ARINC 561 data
power supply +10 volt rail
XMIT CLK
XMT RDY
PARITY ENB digital input
V-
DATA ONE
DATA ZERO
TXAOUT
TXBOUT
561 DATA
V+
1
22
1
VCC
power supply +5 volt rail,
Input data can be loaded when the XMT RDY signal is
high, which indicates theinput buffer register is empty.The
first 8 bit byte is the label byte and is loaded with the A0 in-
put high, which initializes the internal byte counter. The re-
maining three bytes are loaded with A0 in the low state.
Each 8 bit byte is loaded into the input buffer register by a
low pulse on the
input. (See figure 1). After the
fourth byte is loaded, the XMT RDY output goes low. The
contents of the input buffer register are transferred to the
output register during the fourth bit period of the gap. If the
fourthgapbitperiodofthepreviouswordhasalreadybeen
transmitted, the contents of the input buffer register will be
transferredto the outputshiftregister duringthe firstbitpe-
riod after the loading of the fourth byte, and the XMT RDY
outputgoeshigh.
After the output shift register is loaded, the data is shifted
outtotheoutputlogicintheordershowninfigure2.
WRITE
The561SYNCoutputpulseslowwhentheXMTCLKislow
during the 8th bit of the ARINC transmission.
TheXMITCLKisthesameasthedatarate.
HOLT INTEGRATED CIRCUITS
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI-8785PST | ARINC INTERFACE DEVICE 8-BIT PARALLEL DATA CONVERTED 429&561 SERIAL DATA OUT |
| HI-8783PDI | ARINC INTERFACE DEVICE 8-BIT PARALLEL DATA CONVERTED 429&561 SERIAL DATA OUT |
| HI10387 | INDUCTOR,10UH,10% |
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| HI-9142 | 制造商:HANNA INSTRUMENTS 功能描述:HI 9142 DISS. OX METER |
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