參數資料
型號: HI-8590
廠商: Holt Integrated Circuits
英文描述: ARINC 429 LINE DRIVER AND DUAL RECEIVER
中文描述: ARINC公司429線路驅動器和雙接收器
文件頁數: 3/8頁
文件大?。?/td> 97K
代理商: HI-8590
HI-8590
FUNCTIONAL DESCRIPTION (cont.)
RINA
RINB
NULL
ZERO
NULL
ONE
TEST
TESTA
TEST
TEST
TESTB
TESTA
'
TESTB
ROUTB
TESTA
'
TESTB
ROUTA
FIGURE 2 - RECEIVER BLOCK DIAGRAM
TEST
R
S
Q
R
LATCH
S
Q
LATCH
ESD
PROTECTION
AND
TRANSLATION
HARDWIRE
OR
DRIVE FROM LOGIC
HI-6010
HI-8590
FIGURE 3 - APPLICATION DIAGRAM
APPLICATION INFORMATION
RECEIVER
Figure 2 shows the general architecture of the ARINC 429
receiver. The receiver operates off the VCC supply only.
TheinputsRINAandRINBeachhaveseriesresistors,typi-
cally 35K ohms. They connect to level translators whose
resistancetoGroundistypically10Kohms.Therefore,any
series resistance added to the inputs will affect the voltage
translation.
After level translation, the inputs are buffered and become
inputs to a differential amplifier. The amplitude of the dif-
ferential signal is compared to levels derived from a di-
viderbetweenVCCandGround. Thenominalsettingscor-
respond to a One/Zero amplitude of 6.0V and a Null ampli-
tudeof3.3V.
ThestatusoftheARINCreceiverinputislatched. ANull
inputresetsthelatches andaOne or Zero inputsets the
latches.
The logic at the output is controlled by the test signal
which is generated by the logical OR of the TESTA and
TESTB pins.
The receiver output pins float if both
TESTAandTESTBarealogicOne.
Figure 3 shows a possible application of the
HI-8590 interfacing both the ARINC transmit
and receive channels of a HI-6010 which in
turninterfacestoan8-bitmicroprocessorbus.
2
14
12
13
1
4
3
16
6
5
15
10
11
8
9
HOLT INTEGRATED CIRCUITS
3
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HI-8590PSI ARINC 429 LINE DRIVER AND DUAL RECEIVER
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