參數(shù)資料
型號: HI-8281CJI
廠商: HOLT INTEGRATED CIRCUITS INC
元件分類: 通用總線功能
英文描述: ARINC 429 LINE DRIVER AND DUAL RECEICER
中文描述: LINE TRANSCEIVER, CQCC44
封裝: CERQUAD-44
文件頁數(shù): 6/14頁
文件大?。?/td> 302K
代理商: HI-8281CJI
REPEATEROPERATION
Repeater mode of operation allows a data word that has been
received by the HI-8281 to be placed directly into its FIFO for
transmission. Repeater operation is similar to normal receiver
operation. In normal operation, either byte of a received data
word may be read from the receiver latches first by use of SEL
input. During repeater operation however, the lower byte of the
data word must be read first. This is necessary because, as the
data is being read, it is also being loaded into the FIFO and the
transmitter FIFO is always loaded with the lower byte of the data
word first. Signal flow for repeater operation is shown in the
Timing Diagrams section.
LINEDRIVEROPERATION
Theline driver inthe HI-8281isdesignedtodirectlydrive theARINC
429 bus.
The two ARINC outputs (TXA(OUT) and TXB(OUT))
provide a differential voltage to produce a +10 volt One, a -10 volt
Zero, and a 0 volt Null. The device incorporates on board zeners to
translate internal CMOS levels to ARINC specified amplitudes. A
logicinput(SLP1.5) isprovidedtocontroltheslopeofthedifferential
output signal.
No additional hardware is required to control the
slope. A HIGH on SLP1.5 causes a slope of 1.5 s on the ARINC
outputs;aLOW on SLP1.5causesaslopeof10 s. Timingisset by
on-chip resistor and capacitor and tested to be within ARINC
requirements. The HI-8281 has 37.5 ohms in series with each line
driveroutput.
TXA(OUT)
ARINC BIT
TXB(OUT)
NULL
DATA
DATA
DATA
NULL
NULL
WORD GAP
BIT 1
NEXT WORD
BIT 32
BIT 31
BIT 30
CWHLD
t
CWSET
t
CWSTR
t
DATA BUS
CWSTR
VALID
DATA BUS
SELEN
t
D/R
t
ENSEL
t
DATAEN
t
D/REN
t
END/R
t
EN
t
ENSEL
t
SELEN
t
DATAEN
t
ENDATA
t
ENDATA
t
ENEN
t
HI-8281
HOLT INTEGRATED CIRCUITS
6
相關(guān)PDF資料
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