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參數(shù)資料
| 型號(hào)： | HI-3282PQM-10 |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| 中文描述： | 1 CHANNEL(S), 100K bps, SERIAL COMM CONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁(yè)數(shù)： | 5/13頁(yè) |
| 文件大?。?/td> | 142K |
| 代理商： | HI-3282PQM-10 |
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FUNCTIONAL DESCRIPTION (cont.)
TRANSMITTER
AblockdiagramofthetransmittersectionisshowninFigure3.
TheFIFOisloadedsequentiallybyfirstpulsing
andthen
toloadbyte2. Thecontrollogicautomaticallyloads
the 31 bit word in the next available position of the FIFO. IfTX/R,
the transmitter ready flag, is high (FIFO empty), then 8 words,
each 31 bits long, may be loaded. If TX/R is low, then only the
available positions may be loaded. If all 8 positions are full, the
FIFOignoresfurtherattemptstoloaddata.
toloadbyte1
When ENTX goes high, enabling transmission, the FIFO
positions are incremented with the top register loading into the
data transmission shift register. Within 2.5 data clocks the first
data bit appears at either 429DO or
data transmission shift register are presented sequentially to the
outputsintheARINC429formatwiththefollowingtiming:
. The 31 bits in the
ARINCDATABITTIME
DATABITTIME
NULLBITTIME
WORDGAPTIME
10Clocks
5Clocks
5Clocks
40Clocks
80Clocks
40Clocks
40Clocks
320Clocks
The word counter detects when all loaded positions are
transmittedandsetsthetransmitterreadyflag,TX/R,high.
FIFOOPERATION
DATATRANSMISSION
PL1
PL2
429DO
HIGHSPEED
LOWSPEED
TRANSMITTERPARITY
ControlregisterbitBD04(PAREN)enablesparitybitinsertioninto
transmitterdatabit32.ParityisalwaysinsertedifDBCENisopen
or high. If DBCEN is low, logic 0 on PAREN inserts data on bit 32,
andlogic1onPARENinsertsparityonbit32.
HI-3282
TheparitygeneratorcountstheONESinthe31-bitword. IftheBD12
control word bit is set low, the 32nd bit transmitted will make parity
odd. Ifthecontrolbitishigh,theparityiseven.
IftheBD05controlwordbitissetlow,429DOor
connected to the receivers inputs, bypassing the interface circuitry.
Data to Receiver 1 is as transmitted and data to Recevier 2 is the
complement. 429DO and
test.
areinternally
outputs remain active during self
The two receivers are independent of the transmitter. Therefore,
controlofdataexchangesisstrictlyattheoptionoftheuser. Theonly
restrictionsare:
1. The received data may be overwritten if not retrieved within
oneARINCwordcycle.
2. The FIFO can store 8 words maximum and ignores attempts
toloadadditiondataiffull.
3. Byte1ofthetransmitterdatamustbeloadedfirst.
4. Either byte of the received data may be retrieved first. Both
bytesmustberetrievedtoclearthedatareadyflag.
5. After ENTX, transmission enable, goes high it cannot go low
until TX/R, transmitter ready flag, goes high. Otherwise, one
ARINCwordislostduringtransmission.
SELFTEST
SYSTEM OPERATION
429DO
429DO
MASTER RESET (
)
MR
On a Master Reset data transmission and reception are immedi-
ately terminated, the transmit FIFO and receivers cleared as are
the transmit and receive flags. The Control Register is not affected
by a Master Reset.
CONTROL REGISTER
BIT BD13
FIGURE 3.
TRANSMITTER BLOCK DIAGRAM
DATA
CLOCK
PL1
PL2
CLK
TX CLK
PARITY
GENERATOR
DATA AND
NULL TIMER
SEQUENCER
BIT
AND
WORD GAP
COUNTER
START
SEQUENCE
WORD COUNTER
AND
FIFO CONTROL
INCREMENT
WORD COUNT
DATA CLOCK
DIVIDER
FIFO
LOADING
SEQUENCER
429DO
429DO
8 X 31 FIFO
31 BIT PARALLEL
LOAD SHIFT REGISTER
BIT CLOCK
WORD CLOCK
ADDRESS
LOAD
DATA BUS
TX/R
ENTX
CONTROL REGISTER BD04, BD12
DBCEN
HOLT INTEGRATED CIRCUITS
5
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI-3282PQMF | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282PQMF-10 | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282PQT-10 | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282PQTF | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282PQTF-10 | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI-3282PQMF | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282PQMF-10 | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282PQT | 制造商:Holt Integrated Circuits 功能描述:Transmitter and Dual Receiver 44-Pin PQFP |
| HI-3282PQT-10 | 制造商:Holt Integrated Circuits 功能描述:Transmitter and Dual Receiver 44-Pin PQFP |
| HI-3282PQTF | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
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