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參數(shù)資料
| 型號(hào)： | HI-3282PJI |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| 中文描述： | 1 CHANNEL(S), 100K bps, SERIAL COMM CONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁(yè)數(shù)： | 2/13頁(yè) |
| 文件大?。?/td> | 612K |
| 代理商： | HI-3282PJI |
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SYMBOL
VCC
429DI1 (A)
429DI1 (B)
429DI2 (A)
429DI2 (B)
D/R1
D/R2
FUNCTION
POWER
INPUT
INPUT
INPUT
INPUT
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
POWER
I/O
I/O
I/O
I/O
I/O
I/O
INPUT
INPUT
OUTPUT
DESCRIPTION
+5V ±5%
ARINC receiver 1 positive input
ARINC receiver 1 negative input
ARINC receiver 2 positive input
ARINC receiver 2 negative input
Receiver 1 data ready flag
Receiver 2 data ready flag
Receiver data byte selection (0 = BYTE 1) (1 = BYTE 2)
Data Bus control, enables receiver 1 data to outputs
Data Bus control, enables receiver 2 data to outputs if
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
0 V
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Latch enable for byte 1 entered from data bus to transmitter FIFO.
Latch enable for byte 2 entered from data bus to transmitter FIFO. Must follow
Transmitter ready flag. Goes low when ARINC word loaded into FIFO. Goes high
after transmission and FIFO empty.
"ONES" data output from transmitter.
"ZEROES" data output from transmitter.
Enable Transmission
Clock for control word register
Master Clock input
Transmitter Clock equal to Master Clock (CLK), divided by either 10 or 80.
Master Reset, active low
Data bit control Enable. (Active low, with internal pull up to VDD).
SEL
EN1
EN2
is high
BD15
BD14
BD13
BD12
BD11
BD10
BD09
BD08
BD07
BD06
GND
BD05
BD04
BD03
BD02
BD01
BD00
PL1
PL2
TX/R
429DO
429DO
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
OUTPUT
INPUT
INPUT
ENTX
CWSTR
CLK
TX CLK
MR
DBCEN
EN1
PL1.
PIN DESCRIPTION
HI-3282
HOLT INTEGRATED CIRCUITS
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI-3282PJT | 64 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI-3282PQI | 64 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN |
| HI-3282PQT | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282CDI | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282CDM | ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI-3282PJI-10 | 制造商:HOLTIC 制造商全稱(chēng):Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282PJIF | 制造商:Holt Integrated Circuits 功能描述:Transmitter and Dual Receiver 44-Pin PLCC |
| HI-3282PJIF-10 | 制造商:HOLTIC 制造商全稱(chēng):Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282PJM | 制造商:HOLTIC 制造商全稱(chēng):Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
| HI-3282PJM-10 | 制造商:HOLTIC 制造商全稱(chēng):Holt Integrated Circuits 功能描述:ARINC 429 SERIAL TRANSMITTER AND DUAL RECEIVER |
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