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4
10 km Link Support
As well as complying with the LX
5 km standard, the HFCT-5912E
specification provides additional
margin allowing for a 10 km
Gigabit Ethernet link on single
mode fiber. This is accomplished
by limiting the spectral width and
center wavelength range of the
transmitter while increasing the
output optical power and
improving sensitivity. All other
LX cable plant recommendations
should be followed.
Data Line
Interconnections
Agilent
’
s HFBR/HFCT-5912E
fiber-optic transceiver is designed
to couple to +3.3 V PECL signals.
In order to reduce the number of
passive components required on
the customer
’
s board, Agilent has
included the functionality of the
external transmitter bias resistors
and coupling capacitors within
the fiber optic module. The
transceiver is compatible with a
“
dc-coupled
”
configuration and
Figure 3 depicts the circuit
options. Additionally, there is an
internal, 50 Ohm termination
resistance within the transmitter
input section. The transmitter
driver circuit regulates the output
optical power. The regulated light
output will maintain a constant
output optical power provided
the data pattern is reasonably
balanced in duty factor. If the
data duty factor has long,
continuous state times (low or
high data duty factor), then the
output optical power will
gradually change its average
output optical power level to its
preset value.
Per the multisource agreement,
the HFBR/HFCT-5912E feature a
transmit disable function which is
a single-ended +3.3 V TTL input
signal dc-coupled to pin 8.
As for the receiver section, it is
internally ac-coupled between
the preamplifier and the post-
amplifier stages. The actual Data
and Data-bar outputs of the post-
amplifier are dc-coupled to their
respective output pins (pins 4, 5).
Signal Detect is a single-ended,
+3.3 V TTL output signal that is
dc-coupled to pin 3 of the
module. Signal Detect should not
be ac-coupled externally to the
follow-on circuits because of its
infrequent state changes.
Caution should be taken to
account for the proper intercon-
nection between the supporting
Physical Layer integrated circuits
and this HFBR/HFCT-5912E
transceiver. Figure 3 illustrates a
recommended interface circuit
for interconnecting to a +3.3 V dc
PECL fiber-optic transceiver.
Electrical and
Mechanical Interface
Recommended Circuit
Figure 3 shows the recommended
interface for deploying the Agilent
transceiver in a +3.3 V system.
Also present are power supply
filtering arrangements which
comply with the recommendations
of the small form factor
multisource agreement. This
configuration ensures noise
rejection compatibility between
transceivers from various vendors.
Power Supply Filtering and
Ground Planes
It is important to exercise care in
circuit board layout to achieve
optimum performance from these
transceivers. Figure 3 shows the
recommended power supply filter
circuit for the SFF transceiver. It
is further recommended that a
contiguous ground plane be
provided in the circuit board
directly under the transceiver to
provide a low inductance ground
for signal return current. This
recommendation is in keeping
with good high frequency board
layout practices.
The HFBR/HFCT-5912E is
designed to cope with the
electrically noisy environment
inside the chassis box of Gigabit
data communication systems. To
minimize the impact of
conducted and radiated noise
upon receiver performance the
metal cover at the rear of the
HFBR/HFCT-5912E should be
connected to the host system
’
s
circuit common ground plane.
To maximize the shielding
effectiveness and minimize the
radiated emissions that escape
from the host system
’
s chassis
box the metal shield that covers
the MT-RJ receptacle should
make electrical contact with the
aperture required for the optical
connector. The metal cover at
the rear of the fiber-optic module
is dielectrically isolated from the
metal shield that covers the
MT-RJ receptacle to avoid
conflicts between circuit and
chassis common.
Package footprint and front
panel considerations
The Agilent transceiver complies
with the circuit board
“
Common
Transceiver Footprint
”
hole
pattern defined in the original
multisource announcement
which defined the 2 x 5 package
style. This drawing is reproduced
in Figure 5 with the addition of
ANSI Y14.5M compliant
dimensioning to be used as a
guide in the mechanical layout of
your circuit board. Figure 6
shows the front panel dimensions
associated with such a layout.