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參數(shù)資料
| 型號： | HFBR2426HB |
| 英文描述： | Low Cost, Miniature Fiber Optic Components with ST, SMA, SC and FC Ports |
| 中文描述： | 低成本，微型光纖器件與ST，形狀記憶合金，SC和FC端口 |
| 文件頁數(shù)： | 24/31頁 |
| 文件大?。?/td> | 700K |
| 代理商： | HFBR2426HB |
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69
Dynamic Characteristics
-40
°
C to +85
°
C; 4.75 V
≤
Supply Voltage
≤
5.25 V; R
LOAD
= 511
, C
LOAD
= 5 pF unless otherwise specified
Parameter
Symbol
Min. Typ.
[2]
Rise/Fall Time
t
r
, t
f
3.3
10% to 90%
Pulse Width Distortion
PWD
0.4
Max.
6.3
Units
ns
Conditions
P
R
= 100
μ
W peak
Reference
Figure 15
2.5
ns
P
R
= 150
μ
W peak
Note 8,
Figure 14
Note 9
Overshoot
2
%
P
R
= 5
μ
W peak,
t
r
= 1.5 ns
-3 dB Electrical
Bandwidth (Electrical)
Bandwidth - Rise
Time Product
BW
125
0.41
MHz
Hz s
Note 10
Notes:
1. 2.0 mm from where leads enter case.
2. Typical specifications are for operation at T
A
= 25
°
C and V
CC
= +5 V dc.
3. For 200
μ
m HCS fibers, typical responsivity will be 6 mV/
μ
W. Other parameters will change as well.
4. Pin #2 should be ac coupled to a load
≥
510 ohm. Load capacitance must be less than 5 pF.
5. Measured with a 3 pole Bessel filter with a 75 MHz, -3 dB bandwidth. Recommended receiver filters for various bandwidths are
provided in Application Bulletin 78.
6. Overdrive is defined at PWD = 2.5 ns.
7. D is the effective diameter of the detector image on the plane of the fiber face. The numerical value is the product of the actual
detector diameter and the lens magnification.
8. Measured with a 10 ns pulse width, 50% duty cycle, at the 50% amplitude point of the waveform.
9. Percent overshoot is defined as:
PK
- V
100%
V
x 100%
(
10. The conversion factor for the rise time to bandwidth is 0.41 since the HFBR-24X6 has a second order bandwidth limiting
characteristic.
V
100%
)
CAUTION: The small junction sizes inherent to the design of these components increase the components’
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be
taken in handling and assembly of these components to prevent damage and/or degradation which may be
induced by ESD.
Figure 12. Recommended ac Coupled Receiver Circuit. (See AB 78 and AN 1038 for more information.)
0.1 μF
LOGIC
OUTPUT
+5 V
10
30 pF
R
500
MIN.
6
2
3 & 7
POST
AMP
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