參數(shù)資料
型號(hào)： HFA3861IV96
廠商： INTERSIL CORP
元件分類： 無(wú)繩電話/電話
英文描述： Direct Sequence Spread Spectrum Baseband Processor
中文描述： TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP64
封裝： 10 X 10 MM, PLASTIC, TQFP-64
文件頁(yè)數(shù)： 6/35頁(yè)
文件大?。?/td> 218K
代理商： HFA3861IV96
6
Control Port (4 Wire)
The serial control port is used to serially write and read data
to/from the device. This serial port can operate up to a 11MHz
rate or 1/2 the maximum master clock rate of the device,
MCLK (whichever is lower). MCLK must be running and
RESET must be inactive during programming. This port is
used to program and to read all internal registers. The first 8
bits always represent the address followed immediately by the
8 data bits for that register. The LSB of the address is a don’t
care, but reserved for future expansion. The serial transfers
are accomplished through the serial data pin (SD). SD is a
bidirectional serial data bus. Chip Select (CS), and
Read/Write (R/W) are also required as handshake signals for
this port. The clock used in conjunction with the address and
data on SD is SCLK. This clock is provided by the external
source and it is an input to the HFA3861. The timing
relationships of these signals are illustrated in Figures 2
and 3. R/W is high when data is to be read, and low when it
is to be written. CS is an asynchronous reset to the state
machine. CS must be active (low) during the entire data
transfer cycle. CS selects the serial control port device only.
The serial control port operates asynchronously from the
TX and RX ports and it can accomplish data transfers
independent of the activity at the other digital or analog
ports.
The HFA3861 has 96 internal registers that can be
configured through the control port. These registers are
listed in the Configuration and Control Internal Register
table. Table 9 lists the configuration register number, a brief
name describing the register, the HEX address to access
each of the registers and typical values. The type indicates
whether the corresponding register is Read only (R) or
Read/Write (R/W). Some registers are two bytes wide as
indicated on the table (high and low bytes).
TXD
TXCLK
TX_RDY
RXD
RXC
MD_RDY
CS
SD
SCLK
R/W
SDI
RXI
RXQ
AGC
V
REF
I
REF
TX_PE
RX_PE
RESET
TEST
TX_PORT
RX_PORT
CONTROL_PORT
ANALOG
INPUTS
A/D
REFERENCE
POWER
DOWN
SIGNALS
TEST
PORT
8
HFA3861
FIGURE 1. EXTERNAL INTERFACES
ANT_SEL
AGC
TXI
TXQ
ANALOG
OUTPUTS
NOTES:
1. The HFA3861 always uses the rising edge of SCLK to sample address and data and to generate read data.
2. These figures show the controller using the falling edge of SCLK to generate address and data and to sample read data.
FIGURE 2. CONTROL PORT READ TIMING
FIGURE 3. CONTROL PORT WRITE TIMING
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
SCLK
SD
CS
R/W
LSB
DATA OUT
MSB
MSB
ADDRESS IN
FIRST ADDRESS BIT
FIRST DATABIT OUT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
SCLK
SD
CS
R/W
LSB
DATA IN
MSB
MSB
ADDRESS IN
HFA3861
相關(guān)PDF資料
PDF描述
HFA3925 2.4GHz - 2.5GHz 250mW Power Amplifier(2.4GHz - 2.5GHz 250mW 功率放大器)
HFA3926 2.0GHz - 2.7GHz 250mW Power Amplifier(2.0GHz - 2.7GHz 250mW 功率放大器)
HFA3926IA 2.0GHz - 2.7GHz 250mW Power Amplifier
HFA3926IA96 2.0GHz - 2.7GHz 250mW Power Amplifier
HFA5251 800MHz Monolithic Pin Driver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HFA3863 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor
HFA3863IN 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor
HFA3863IN96 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband Processor
HFA3925 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:null2.4GHz - 2.5GHz 250mW Power Amplifier
HFA3925IA 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*