參數(shù)資料
型號(hào)： HFA3860
廠商： Intersil Corporation
英文描述： 3.3V 288-mc CPLD
中文描述： 11 Mbps的直接序列擴(kuò)頻基帶處理器
文件頁(yè)數(shù)： 31/40頁(yè)
文件大?。?/td> 250K
代理商： HFA3860
4-31
CONFIGURATION REGISTER 22 ADDRESS (58h) TX LENGTH FIELD (HIGH)
Bits 7:0
This 8-bit register contains the higher byte (bits 8-15) of the transmit Length Field described in the Header. This byte
combined with the lower byte indicates the number of bits to be transmitted in the data packet.
CONFIGURATION REGISTER 23 ADDRESS (5Ch) TX LENGTH FIELD (LOW)
Bits 7:0
This 8-bit register contains the lower byte (bits 0-7) of the transmit Length Field described in the Header. This byte combined
with the higher byte indicates the number of bits to be transmitted in the data packet.
CONFIGURATION REGISTER 24 ADDRESS (60h) RX STATUS
This read only register is provided for MACs that can’t process the header fields from the RXD port.
Bits 7:6
RX signal field detected
00 = DBPSK - 11 Chip Sequence (1 Mbps)
01 = DQPSK - 11 Chip Sequence (2 Mbps)
10 = BMBOK - modified 8 chip Walsh sequence (5.5 Mbps)
11 = QMBOK - modified 8 chip Walsh sequence (11 Mbps)
Bit 5
Search/Acquisition Status (set to 0 when RX_PE is inactive)
0 = Searching
1 = Carrier Acquired
Bit 4
SFD search status (set to 0 when RX_PE is inactive)
0 = Searching
1 = SFD Found
Bit 3
Signal Field Valid (set to 0 when RX_PE is inactive) signal field must be one of the 4 field values in CR 16 to CR19
0 = Not Valid
1 = Valid
Bit 2
Valid header CRC (set to 0 when RX_PE is inactive)
0 = Not Valid
1 = Valid
Bit 1
Antenna received on. Indicates which antenna the receiver was on when the last valid CRC occurred.
0 = Antenna B
1 = Antenna A
Bit 0
Always 0
CONFIGURATION REGISTER 25 ADDRESS (64h) RX SERVICE FIELD STATUS
Bits 7:0
This register contains the detected received 8-bit value of the Service Field for the Header. This field is reserved for future
use. It should be the value programmed into register 21 of the transmitter.
CONFIGURATION REGISTER 26 ADDRESS (68h) RX LENGTH FIELD STATUS (HIGH)
Bits 7:0
This register contains the detected higher byte (bits 8-15) of the received Length Field contained in the Header. This byte
combined with the lower byte indicates the number of transmitted bits in the data packet.
CONFIGURATION REGISTER ADDRESS 27 (6Ch) RX LENGTH FIELD STATUS (LOW)
Bits 7:0
This register contains the detected lower byte of the received Length Field contained in the Header. This byte combined with
the upper byte indicates the number of transmitted bits in the data packet.
HFA3860
相關(guān)PDF資料
PDF描述
HFA3860IV 11 Mbps Direct Sequence Spread Spectrum Baseband Processor
HFA3860IV96 11 Mbps Direct Sequence Spread Spectrum Baseband Processor
HFA3861A Direct Sequence Spread Spectrum Baseband Processor(直接序列擴(kuò)頻基帶處理器)
HFA3861B Direct Sequence Spread Spectrum Baseband Processor(直接序列擴(kuò)譜基帶處理器)
HFA3861 Direct Sequence Spread Spectrum (DSSS) baseband processor(直接序列擴(kuò)頻基帶處理器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HFA3860A 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband
HFA3860AEVAL1 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述:
HFA3860AIV 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband
HFA3860AIV WAF 制造商:Harris Corporation 功能描述:
HFA3860AIV96 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Direct Sequence Spread Spectrum Baseband
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