參數(shù)資料
型號(hào): HFA3842A
廠商: Intersil Corporation
英文描述: PCMCIA/USB Wireless LAN Medium Access Controller
中文描述: 的PCMCIA / USB無(wú)線局域網(wǎng)媒體訪問(wèn)控制器
文件頁(yè)數(shù): 22/27頁(yè)
文件大小: 528K
代理商: HFA3842A
22
TABLE 9. BBP TRANSMIT PORT AC ELECTRICAL
SPECIFICATIONS
PARAMETER
SYMBOL
MIN
MAX
UNITS
TX_PE to I
OUT
/Q
OUT
(1st Valid Chip)
t
D1
2.18
2.3
μ
s (Note 17)
TX_PE Inactive Width
t
TLP
2.22
-
μ
s (Note 18)
TXC Width Hi or Low
t
TCD
40
-
ns
TXRDY Active to 1st
TX_CLK Hi
t
RC
260
-
ns
Setup TXD to TXC Hi
t
TDS
30
-
ns
Hold TXD to TXC Hi
t
TDH
0
-
ns
TXC to TX_PE
Inactive (1MBps)
t
PEH
0
965
ns (Note 20)
TXC to TX_PE
Inactive (2MBps)
t
PEH
0
420
ns (Note 20)
TXC to TX_PE
Inactive (5.5MBps)
t
PEH
0
160
ns (Note 20)
TXC to TX_PE
Inactive (11MBps)
t
PEH
0
65
ns (Note 20)
TXRDY Inactive To
Last Chip of MPDU
Out
t
RI
-20
20
ns
TXD Modulation
Extension
t
ME
2
-
μ
s (Note 19)
NOTES:
17. I
OUT
/Q
OUT
are modulated before first valid chip of preamble is
output to provide ramp up time for RF/IF circuits.
18. TX_PE must be inactive before going active to generate a new
packet.
19. I
OUT
/Q
OUT
are modulated after last chip of valid data to provide
ramp down time for RF/IF circuits.
20. Delay from TXC to inactive edge of TXPE to prevent next TXC.
Because TXPE asynchronouslystopsTXC, TXPE going inactive
within 40ns of TXC will cause TXC minimum hi time to be less
than 40ns.
TABLE 9. BBP TRANSMIT PORT AC ELECTRICAL
SPECIFICATIONS (Continued)
PARAMETER
SYMBOL
MIN
MAX
UNITS
NOTE: Preamble/Header and Data is transmitted LSB first. TXD shown generated from rising edge of TXC.
FIGURE 23. BBP TRANSMIT PORT TIMING
TXC
TX_PE
TXD
TXRDY
FIRST DATA BIT SAMPLED
LSB
MSB
DATA PACKET
LAST DATA BIT SAMPLED
DEASSERTED WHEN LAST
CHIP OF MPDU CLEARS
MOD PATH OF 3861
FIGURE 24. BBP TRANSMIT PORT SIGNAL TIMING
t
PEH
t
TLP
t
ME
t
RI
t
TCD
t
TCD
t
RC
t
TDH
t
TDS
t
DI
TX_PE
I
OUT,
Q
OUT
TXRDY
TXC
TXD
HFA3842A
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