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參數(shù)資料
| 型號(hào)： | HFA1205 |
| 廠商： | Intersil Corporation |
| 英文描述： | Dual, 425MHz, Low Power, Video Operational Amplifier(雙路、425MHz低功耗視頻運(yùn)算放大器) |
| 中文描述： | 雙通道，425MHz核心，低功耗，視頻運(yùn)算放大器（雙路，425MHz核心低功耗視頻運(yùn)算放大器） |
| 文件頁(yè)數(shù)： | 5/15頁(yè) |
| 文件大?。?/td> | 256K |
| 代理商： | HFA1205 |
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5
Non-inverting Input Source Impedance
For best operation, the DC source impedance seen by the
non-inverting input should be
≥
50
.
This is especially
important in inverting gain configurations where the non-
inverting input would normally be connected directly to GND.
Pulse Undershoot and Asymmetrical Slew Rates
The HFA1205 utilizes a quasi-complementary output stage
to achieve high output current while minimizing quiescent
supply current. In this approach, a composite device
replaces the traditional PNP pulldown transistor. The
composite device switches modes after crossing 0V,
resulting in added distortion for signals swinging below
ground, and an increased undershoot on the negative
portion of the output waveform (see Figures 7, 11, 15 and
19). This undershoot isn’t present for small bipolar signals,
or large positive signals (see Figures 5, 6, 9, 10, 13, 14, 17
and 18). Another artifact of the composite device is
asymmetrical slew rates for output signals with a negative
voltage component. The slew rate degrades as the output
signal crosses through 0V (see Figures 7, 11, 15, and 19),
resulting in a slower overall negative slew rate. Positive only
signals have symmetrical slew rates as illustrated in the
large signal positive pulse response graphs (see Figures 5,
9, 13 and 17).
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board.
The
use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10
μ
F) tantalum in parallel with a small value
(0.1
μ
F) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
Care must also be taken to minimize the capacitance to
ground at the amplifier’s inverting input (-IN). The larger this
capacitance, the worse the gain peaking, resulting in pulse
overshoot and possible instability. Reduce this capacitance
by removing the ground plane under traces connected to -IN,
and keep connections to -IN as short as possible.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
S
) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
S
and C
L
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
R
S
and C
L
form a low pass network at the output, thus
limiting system bandwidth well below the amplifier
bandwidth of 425MHz (for A
V
= +2). By decreasing R
S
as
C
L
increases (as illustrated in the curves), the maximum
bandwidth is obtained without sacrificing stability. In spite
of this, bandwidth still decreases as the load capacitance
increases. For example, at A
V
= +2, R
S
= 50
, C
L
= 22pF,
the overall bandwidth is limited to 230MHz, and bandwidth
drops to 80MHz at A
V
= +2, R
S
= 7
, C
L
= 390pF.
Evaluation Board
The performance of the HFA1205 may be evaluated using
the HA5023 Evaluation Board.
The performance of the HFA1205IB (SOIC) may be
evaluated using the HA5023 Evaluation Board and a SOIC
to DIP adaptor like the Aries Electronics Part Number
08-350000-10.
The schematic for amplifier 1 and the board layout are
shown in Figure 2 and Figure 3. Resistors R
F
, R
G
and R
S
may require a change to the appropriate value (see
“Optimum Feedback Resistor” section) for the gain being
evaluated.
To order evaluation boards (Part Number HA5023EVAL),
please contact your local sales office.
0
100
200
300
400
0
10
20
30
40
50
LOAD CAPACITANCE (pF)
S
)
A
V
= +2
150
250
350
50
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
HFA1205
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