參數(shù)資料
型號: HEF4052B
廠商: NXP Semiconductors N.V.
英文描述: Dual 4-channel analogue multiplexer/demultiplexer(雙四通道模擬多路復(fù)用器/多路分解器)
中文描述: 雙4通道模擬多路復(fù)用器/分離器(雙四通道模擬多路復(fù)用器/多路分解器)
文件頁數(shù): 7/9頁
文件大?。?/td> 120K
代理商: HEF4052B
January 1995
7
Philips Semiconductors
Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
AC CHARACTERISTICS
V
EE
= V
SS
= 0 V; T
amb
= 25
°
C; input transition times
20 ns
AC CHARACTERISTICS
V
EE
= V
SS
= 0 V; T
amb
= 25
°
C; input transition times
20 ns
V
DD
V
TYPICAL FORMULA FOR P (
μ
W)
Dynamic power
dissipation per
package (P)
5
1 300 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
6 100 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
15 600 f
i
+ ∑
(f
o
C
L
)
×
V
DD2
where
f
i
= input freq. (MHz)
f
o
= output freq. (MHz)
C
L
= load capacitance (pF)
(f
o
C
L
) = sum of outputs
V
DD
= supply voltage (V)
10
15
V
DD
V
SYMBOL
TYP.
MAX.
Propagation delays
V
is
V
os
HIGH to LOW
5
10
5
5
10
5
5
150
65
50
150
75
50
20
10
10
20
10
10
305
135
100
300
150
100
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
note 1
10
15
5
10
15
5
10
15
5
10
15
t
PHL
note 1
LOW to HIGH
t
PLH
A
n
V
os
HIGH to LOW
note 2
t
PHL
note 2
LOW to HIGH
t
PLH
Output disable times
E
V
os
HIGH
5
95
90
90
100
90
90
190
180
180
205
180
180
ns
ns
ns
ns
ns
ns
note 3
10
15
5
10
15
t
PHZ
note 3
LOW
t
PLZ
Output enable times
E
V
os
HIGH
5
130
55
45
120
50
35
260
115
85
240
100
75
ns
ns
ns
ns
ns
ns
note 3
10
15
5
10
15
t
PZH
note 3
LOW
t
PZL
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