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參數(shù)資料
| 型號： | HEF4046BF |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Phase-locked loop |
| 中文描述： | 鎖相環(huán) |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 416K |
| 代理商： | HEF4046BF |
January 1995
9
Philips Semiconductors
Product specification
Phase-locked loop
HEF4046B
MSI
DESIGN INFORMATION
VCO component selection
Recommended range for R1 and R2: 10 k
to 1 M
; for C1: 50 pF to any practical value.
1.
VCO without frequency offset (R2 =
∞
).
a) Given f
o
: use f
o
with Fig.7 to determine R1 and C1.
b) Given f
max
: calculate f
o
from f
o
=
1
2
f
max
; use f
o
with Fig.7 to determine R1 and C1.
2.
VCO with frequency offset.
a) Given f
o
and f
L
: calculate f
min
from the equation f
min
= f
o
f
L
; use f
min
with Fig.8 to determine R2 and C1; calculate
f
f
min
f
min
f
o
f
L
–
f
min
b) Given f
min
and f
max
: use f
min
with Fig.8 to determine R2 and C1; calculate
with Fig.9 to determine R2/R1 to obtain R1.
CHARACTERISTIC
USING PHASE COMPARATOR 1
USING PHASE COMPARATOR 2
No signal on SIGN
IN
VCO in PLL system adjusts
to centre frequency (f
o
)
90
°
at centre frequency (f
o
),
approaching 0
°
and 180
°
at
ends of lock range (2 f
L
)
yes
VCO in PLL system adjusts to min.
frequency (f
min
)
always 0
°
in lock
(positive-going edges)
Phase angle between
SIGN
IN
and COMP
IN
Locks on harmonics of
centre frequency
Signal input noise
rejection
Lock frequency
range (2 f
L
)
Capture frequency
range (2 f
C
)
no
high
low
the frequency range of the input signal on which the loop will stay locked if it was
initially in lock; 2 f
L
= full VCO frequency range = f
max
f
min
the frequency range of the input signal on which the loop will lock if it was initially
out of lock
depends on low-pass
filter characteristics; f
C
<
f
L
the frequency of the VCO when VCO
IN
at
1
2
V
DD
f
C
= f
L
Centre frequency (f
o
)
----------
from the equation
----------
------+
; use
f
L
----------
with Fig. 9 to determine the ratio R2/R1 to obtain R1.
=
f
f
min
----------
; use
f
f
min
----------
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HEF4046BN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Phase-locked loop |
| HEF4046BP | 制造商:NXP Semiconductors 功能描述:IC 4000 LOCMOS LOGIC 制造商:NXP Semiconductors 功能描述:IC, 4000 LOCMOS LOGIC 制造商:NXP 功能描述:2.7Mhz 16-DIP Phase Lock Loop 制造商:NXP Semiconductors 功能描述:IC, PHASE LOCK LOOP, 2.7MHZ, 16-DIP; PLL Type:VCO; Frequency:7MHz; Supply Current:750A; Supply Voltage Min:3V; Supply Voltage Max:15V; Digital IC Case Style:DIP; No. of Pins:16; Operating Temperature Min:-40C; Family Type:4000 CMOS;RoHS Compliant: Yes |
| HEF4046BP,652 | 功能描述:鎖相環(huán) - PLL PHASE LOCKED LOOP W/VCO RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| HEF4046BP652 | 制造商:NXP Semiconductors 功能描述:IC PHASE LOCKED LOOP (PLL) VCO 2.7MHZ |
| HEF4046BPN | 制造商:NXP Semiconductors 功能描述:PLL Single 16-Pin PDIP Bulk |
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