參數(shù)資料
型號: HEF4031BF
廠商: NXP Semiconductors N.V.
英文描述: 64-stage static shift register
中文描述: 64級靜態(tài)移位寄存器
文件頁數(shù): 7/7頁
文件大?。?/td> 76K
代理商: HEF4031BF
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A
Fig.5 Cascading using direct clocking for high speed operation (see clock rise and fall time requirements).
(1) Recirculating input.
(2) Mode control: V
DD
= recirculation; ground (V
SS
) = new data.
Fig.6 Cascading using delayed clocking for reduced clock drive requirements.
(1) Recirculating input.
(2) Mode control: V
DD
= recirculation; ground (V
SS
) = new data.
(3) For recirculation mode only, FF to delay data until first register delayed clocking has occurred.
(4) Delayed clock-to-clock; new data into first register.
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HEF4031BP SHIFT REGISTER|CMOS|DIP|16PIN|PLASTIC
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