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參數(shù)資料
| 型號(hào)： | HEF4027BTD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 通用總線(xiàn)功能 |
| 英文描述： | Dual JK flip-flop |
| 中文描述： | 4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | PLASTIC, SO-16 |
| 文件頁(yè)數(shù)： | 2/5頁(yè) |
| 文件大小： | 64K |
| 代理商： | HEF4027BTD |
January 1995
2
Philips Semiconductors
Product specification
Dual JK flip-flop
HEF4027B
flip-flops
DESCRIPTION
The HEF4027B is a dual JK flip-flop which is
edge-triggered and features independent set direct
(S
D
), clear direct (C
D
), clock (CP) inputs and outputs
(O,O). Data is accepted when CP is LOW, and transferred
to the output on the positive-going edge of the clock. The
active HIGH asynchronous clear-direct (C
D
) and set-direct
(S
D
) are independent and override the J, K, and CP inputs.
The outputs are buffered for best system performance.
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
FUNCTION TABLES
Notes
1.
H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
O
n
+
1
= state after clock positive transition
PINNING
FAMILY DATA, I
DD
LIMITS category FLIP-FLOPS
See Family Specifications
INPUTS
OUTPUTS
S
D
H
L
H
C
D
L
H
H
CP
J
K
O
O
X
X
X
X
X
X
X
X
X
H
L
H
L
H
H
INPUTS
OUTPUTS
S
D
L
C
D
L
CP
J
K
O
n
+
1
O
n
+
1
L
L
no change
L
L
H
L
H
L
L
L
L
H
L
H
L
L
H
H
O
n
O
n
J,K
CP
S
D
C
D
O
O
synchronous inputs
clock input (L to H edge-triggered)
asynchronous set-direct input (active HIGH)
asynchronous clear-direct input (active HIGH)
true output
complement output
HEF4027BP(N):
HEF4027BD(F):
HEF4027BT(D):
( ): Package Designator North America
16-lead DIL; plastic (SOT38-1)
16-lead DIL; ceramic (cerdip) (SOT74)
16-lead SO; plastic (SOT109-1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HEC4027BD | Dual JK flip-flop |
| HEC4027BF | Dual JK flip-flop |
| HEC4027BN | Dual JK flip-flop |
| HEC4027BP | Dual JK flip-flop |
| HEC4027BTD | Dual JK flip-flop |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HEF4027BTD-T | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:J-K-Type Flip-Flop |
| HEF4027BT-Q100J | 制造商:NXP Semiconductors 功能描述:HEF4027BT-Q100/SO16/REEL13// - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC FLIP FLOP DUAL JK 16SOIC |
| HEF4028B | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:1-of-10 decoder |
| HEF4028BD | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:1-of-10 decoder |
| HEF4028BF | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:1-of-10 decoder |
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