參數(shù)資料
型號(hào): HEF4011BT
廠商: NXP Semiconductors N.V.
元件分類(lèi): 通用總線功能
英文描述: Quad 2-input NAND gate
中文描述: 四2輸入與非門(mén)
封裝: HEF4011BP<SOT27-1 (DIP14)|<<http://www.nxp.com/packages/SOT27-1.html<1<Always Pb-free,;HEF4011BT<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<week
文件頁(yè)數(shù): 5/12頁(yè)
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代理商: HEF4011BT
HEF4011B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 30 March 2011
5 of 12
NXP Semiconductors
HEF4011B
Quad 2-input NAND gate
11. Dynamic characteristics
[1]
The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (C
L
in pF).
t
pd
is the same as t
PLH
and t
PHL
.
[2]
Table 7.
T
amb
= 25
C; for waveforms see
Figure 4
; for test circuit see
Figure 5
; unless otherwise specified.
Symbol Parameter
Extrapolation formula
[1]
t
pd
propagation delay
28 + 0.55
C
L
14 + 0.23
C
L
12 + 0.16
C
L
t
THL
HIGH to LOW output transition time
10 + 1.00
C
L
Dynamic characteristics
V
DD
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
Min
Typ
55
25
20
60
30
20
60
30
20
Max
110
45
35
120
60
40
120
60
40
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
[2]
-
-
-
-
-
-
-
-
-
9 + 0.42
C
L
6 + 0.28
C
L
10 + 1.00
C
L
9 + 0.42
C
L
6 + 0.28
C
L
t
TLH
LOW to HIGH output transition time
Table 8.
V
SS
= 0 V; t
r
= t
f
20 ns; T
amb
= 25
C.
Symbol Parameter
P
D
dynamic power dissipation
Dynamic power dissipation
V
DD
5 V P
D
= 1300
f
i
+
(f
o
C
L
)
V
DD2
(
W)
10 V P
D
= 6000
f
i
+
(f
o
C
L
)
V
DD2
(
W)
15 V P
D
= 20100
f
i
+
(f
o
C
L
)
V
DD2
(
W)
Typical formula
Where
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
(f
o
C
L
) = sum of the outputs;
V
DD
= supply voltage in V.
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