參數(shù)資料
型號(hào): HEF40098BP
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Hex inverting buffer: 3- state
封裝: HEF40098BP<SOT38-4 (DIP16)|<<http://www.nxp.com/packages/SOT38-4.html<1<Always Pb-free,;HEF40098BT<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<wee
文件頁(yè)數(shù): 5/13頁(yè)
文件大?。?/td> 139K
代理商: HEF40098BP
HEF40098B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 14 September 2011
5 of 13
NXP Semiconductors
HEF40098B
Hex inverting buffer; 3-state
11. Dynamic characteristics
[1]
The typical value of the propagation delay and transition times are calculated from the extrapolation formula as shown (C
L
in pF).
Table 7.
V
SS
= 0 V; T
amb
= 25
C; for test circuit see
Figure 6
; unless otherwise specified.
Symbol
Parameter
Conditions
t
PHL
HIGH to LOW
propagation delay
see
Figure 4
Dynamic characteristics
V
DD
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
5 V
Extrapolation formula
[1]
70 ns + (0.20 ns/pF)C
L
31 ns + (0.08 ns/pF)C
L
22 ns + (0.06 ns/pF)C
L
50 ns + (0.30 ns/pF)C
L
24 ns + (0.13 ns/pF)C
L
23 ns + (0.05 ns/pF)C
L
15 ns + (0.30 ns/pF)C
L
10 ns + (0.11 ns/pF)C
L
7 ns + (0.07 ns/pF)C
L
10 ns + (0.50 ns/pF)C
L
8 ns + (0.24 ns/pF)C
L
6 ns + (0.18 ns/pF)C
L
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
80
35
25
65
30
25
30
15
10
35
20
15
45
35
30
65
Max
160
70
50
130
60
50
60
30
20
70
40
30
85
65
60
135
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
nAn to nYn;
t
PLH
LOW to HIGH
propagation delay
nAn to nYn;
see
Figure 4
t
THL
HIGH to LOW output
transition time
see
Figure 4
t
TLH
LOW to HIGH output
transition time
see
Figure 4
t
PHZ
HiGH to OFF-state
propagation delay
nOE, to nYn;
see
Figure 5
t
PLZ
LOW to OFF-state
propagation delay
nOE, to nYn;
see
Figure 5
10 V
15 V
5 V
10 V
15 V
5 V
10 V
15 V
-
-
-
-
-
-
-
-
40
35
70
35
30
90
40
35
80
70
140
75
65
185
85
70
ns
ns
ns
ns
ns
ns
ns
ns
t
PZH
OFF-state to HIGH
propagation delay
nOE, to nYn;
see
Figure 5
t
PZL
OFF-state to LOW
propagation delay
nOE, to nYn;
see
Figure 5
Table 8.
P
D
can be calculated (in
W) from the formulas shown. V
SS
= 0 V; t
r
= t
f
20 ns; T
amb
= 25
C.
Symbol
Parameter
V
DD
Typical formula for P
D
(
W)
P
D
dynamic power
dissipation
10 V
P
D
= 22800
f
i
+
(f
o
C
L
)
V
DD2
15 V
P
D
= 81000
f
i
+
(f
o
C
L
)
V
DD2
Dynamic power dissipation P
D
where:
f
i
= input frequency in MHz,
f
o
= output frequency in MHz,
C
L
= output load capacitance in pF,
V
DD
= supply voltage in V,
(C
L
f
o
) = sum of the outputs.
5 V
P
D
= 5000
f
i
+
(f
o
C
L
)
V
DD2
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