參數(shù)資料
型號(hào)： HE84G752B
廠(chǎng)商： King Billion Electronics Co., Ltd.
英文描述： 8-BIT MICRO-CONTROLLER
中文描述： 8位微控制器
文件頁(yè)數(shù)： 43/49頁(yè)
文件大?。?/td> 474K
代理商： HE84G752B
KING BILLION ELECTRONICS CO., LTD
駿
億
電
子
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公
司
HE84G752B
HE80004 Series
January 21, 2005
This specification is subject to change without notice. Please contact sales person for the latest version before use.
43
V0.93
Address NAME
17H
18~1FH
20H
21H
22~2AH
2BH
2CH
2DH
2EH
2FH~3FH
* The definitions of PWMC and VOC are different for 7-bit and 8-bit voice output. Please refer to voice
output section for the detailed description.
Extension registers:
Address
Name
Function
00H
RBR
UART RECEIVER BUFFER
01H
THR
UART TRANSMITTER HOLDING REGISTER
02H
IEIR
0
RLSI
THRI
RBRI
03H
LCR
BRGE
SB
SP
EPS
04H
BRL
UART LSB of Baud Rate Register
05H
BRH
UART MSB of Baud Rate Register
06H
LSR
0
TEMT
THRE
BI
15H
IRL
IROE
IR PWM LOW DURATION
16H
IRH
-
IR PWM HIGH DURATION
17H
LVDC
LVDO
-
-
-
Mask Options:
NAME
VALUE
0
low voltage reset disable
MO_LVRE
1
low voltage reset enable
0
R/C oscillator For fast clock
MO_FXTAL
1
Crystal oscillator For fast clock
0
R/C oscillator For 32k clock
MO_SXTAL
1
Crystal oscillator For 32k clock
00
slow clock only
MO_FCK/SCKN
01
illegal
Field
I/O port 17
Reserved
Mode
R/W
R/W
R/W
R/W
R/W
w
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R/W
R/W
R/W
R/W
RESET
1111 1111
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxx0 0000
xxx0 0010
xxx0 0100
xxx0 0110
xxx0 1000
xxx0 1010
xxx0 1100
xxx0 1110
xxx1 0000
xxx1 0010
xxx1 0100
xxx1 0110
xxx1 1000
xxx1 1010
xxx1 1100
xxx1 1110
0000 0001
0000 0010
0000 0011
xxxx xxxx
PRT17
EXTAS
EXTDA
GRAY16
GRAY0
GRAY1
GRAY2
GRAY3
GRAY4
GRAY5
GRAY6
GRAY7
GRAY8
GRAY9
GRAYA
GRAYB
GRAYC
GRAYD
GRAYE
GRAYF
PSA1
PSA2
PSA3
Extension port address register
Extension port data register
Reserved
32 to 16 Gray Level Palette Register
Gray level 0 mapping register
Gray level 1 mapping register
Gray level 2 mapping register
Gray level 3 mapping register
Gray level 4 mapping register
Gray level 5 mapping register
Gray level 6 mapping register
Gray level 7 mapping register
Gray level 8 mapping register
Gray level 9 mapping register
Gray level A mapping register
Gray level B mapping register
Gray level C mapping register
Gray level D mapping register
Gray level E mapping register
Gray level F mapping register
Physical page address mapping register for logical page 1
Physical page address mapping register for logical page 2
Physical page address mapping register for logical page 3
Reserved
Mode
R
R/W
R/W
R/W
R/W
R/W
R
R/W
W
RESET
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0110 0000
0xxx xxxx
-xxx xxxx
x--- ---0
0
ID2
STB
ID1
WLS1
ID0
WLS0
PEN
FE
PE
OE
DR
-
-
-
LVDE
R/W
NOTE
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