參數(shù)資料
型號: HDLX-2416
英文描述: Four Character 5.0 mm (0.2 inch) Smart 5 x 7 Alphanumeric Displays(四字符 5.0 mm (0.2 英寸) 智能 5 x 7文字數(shù)字顯示器)
中文描述: 四字符5.0毫米(0.2英寸)智能5 × 7字母數(shù)字顯示器(四字符5.0毫米(0.2英寸)智能5 × 7文字數(shù)字顯示器)
文件頁數(shù): 9/12頁
文件大?。?/td> 198K
代理商: HDLX-2416
9
CUE
BL
CLR
CE
1
CE
2
WR
CU
A
1
A
0
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Function
0
1
1
Display ASCII
1
1
1
Display Stored Cursor
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
Reset RAMs
Blank Display but do not reset
RAMS and Control Register
X
0
1
Extended
Functions
Disable
Intensity
Control
Master
Blank
Digit
Blank
Disable 0
Digit
Cursor
0
Write to Attribute RAM
and Control Register
0
0
0
0 =
Enable
D
1
-D
5
000 = 100%*
001 = 60%
010 = 40%
011 = 27%
100 = 17%
101 = 10%
110 = 7%
111 = 3%
0 =
Display
ON
Digit
Blank
Disable 1
Digit
Cursor
1
DBD
= 0, Allows Digit n to be
blanked
0
0
1
DBD
= 1 Prevents Digit n
from being blanked.
X
X
1
0
0
0
1 =
Disable
D
1
-D
5
1 =
Display
Blanked
Digit
Blank
Disable 2
Digit
Cursor
2
0
1
0
DC
= 0 Removes cursor from
Digit n
D
Digiit
Blank
Disable 3
Digit
Cursor
3
0
1
1
Always
Enabled
DC
= 1 Stores cursor at
Digit n
1
0
0
Digit 0 ASCII Data (Right Most Character)
1
0
1
Digit 1 ASCII Data
X
X
1
0
0
0
Write to Character RAM
1
1
0
Digit 2 ASCII Data
1
1
1
Digit 3 ASCII Data (Left Most Character)
1
X
X
X
X
1
X
1
X
X
X
X
X
X
X
X
X
X
X
No Change
X
X
1
Display Clear
Data stored in the Character
RAM, Control Register, and
Attribute RAM will be cleared if
the clear (CLR) is held low for a
minimum of 10
μ
s. Note that the
display will be cleared regardless
of the state of the chip enables
(CE
, CE
). After the display is
cleared, the ASCII code for a
space (20hex) is loaded into all
character RAM locations and
00hex is loaded into all Attribute
RAM/Control Register memory
locations.
Data Entry
Figure 2 shows a truth table for
the HDLX-2416 display. Setting
the chip enables (CE
, CE
) to
logic 0 and the cursor select (CU)
to logic 1 will enable ASCII data
loading. When cursor select (CU)
is set to logic 0, data will be
loaded into the Control Register
and Attribute RAM. Address
inputs A
-A
are used to select the
digit location in the display. Data
inputs D
-D
are used to load
information into the display. Data
will be latched into the display on
the rising edge of the WR signal.
D
-D
, A
-A
, CE
, CE
, and CU
must be held stable during the
write cycle to ensure that correct
data is stored into the display.
Data can be loaded into the
display in any order. Note that
when A
and A
are logic 0, data is
stored in the right most display
location.
Cursor
When cursor enable (CUE) is a
logic 1, a cursor will be displayed
in all digit locations where a logic
1 has been stored in the Digit
Cursor memory in the Attribute
RAM. The cursor consists of all
35 dots ON at half brightness. A
flashing cursor can be displayed
by pulsing CUE. When CUE is a
logic 0, the ASCII data stored in
the Character RAM will be dis-
played regardless of the Digit
Cursor bits.
Blanking
Blanking of the display is con-
trolled through the BL input, the
Control Register and Attribute
RAM. The user can achieve a
variety of functions by using these
controls in different combinations,
such as full hardware display
blank, software blank, blanking of
individual characters, and syn-
chronized flashing of individual
characters or entire display (by
Figure 2. Display Truth Table
0 = Logic 0; 1 = Logic 1; X = Do Not Care; * 000 = 27% for HDLU-2416
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