參數(shù)資料
型號： HDD32M72B9-13A
廠商： Hanbit Electronics Co.,Ltd.
英文描述： DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM
中文描述： 256MB的DDR SDRAM內(nèi)存模塊（32Mx72bit）根據(jù)on32Mx8，4Banks，8K的參考。，ECC無緩沖的SO - DIMM
文件頁數(shù)： 8/12頁
文件大?。?/td> 210K
代理商： HDD32M72B9-13A
HANBit
HDD32M72B9
URL : www.hbe.co.kr 8 HANBit Electronics Co.,Ltd.
REV 1.0 (July. 2003)
AC CHARACTERISTICS
(These AC charicteristics were tested on the Component)
DDR333
DDR266A
DDR266B
-16A
-13A
-13B
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
UNIT NOTE
Row cycle time
t
RC
60
65
65
ns
Refresh row cycle time
t
RFC
72
75
75
ns
Row active time
t
RAS
42
70K
45
120K
45
120K
ns
/RAS to /CAS delay
t
RCD
18
20
20
ns
Row precharge time
t
RP
18
20
20
ns
Row active to Row active delay
t
RRD
12
15
15
ns
Write recovery time
t
WR
15
15
5
t
CK
Last data in to Read command
t
CDLR
1
1
1
t
CK
Col. address to Col. address delay
t
CCD
1
1
1
t
CK
CL=2.0
7.5
12
7.5
12
10
12
ns
5
Clock cycle time
CL=2.5
t
CK
6
12
7.5
12
7.5
12
ns
5
Clock high level width
t
CH
0.45
0.55
0.45
0.55
0.45
0.55
t
CK
Clock low level width
t
CL
0.45
0.55
0.45
0.55
0.45
0.55
t
CK
DQS-out access time from CK/CK*
t
DQSCK
-0.6
+0.6
-0.75
+0.75
-0.75
+0.75
ns
Output data access time from CK/CK*
t
AC
-0.7
+0.7
-0.75
+0.75
-0.75
+0.75
ns
Data strobe edge to ouput data edge
t
DQSQ
-
0.45
-
0.5
-
0.5
ns
5
Read Preamble
t
RPRE
0.9
1.1
0.9
1.1
0.9
1.1
t
CK
Read Postamble
t
RPST
0.4
0.6
0.4
0.6
0.4
0.6
t
CK
CK to valid DQS-in
t
DQSS
0.75
1.25
0.75
1.25
0.75
1.25
t
CK
DQS-in setup time
t
WPRES
0
0
0
ns
2
DQS-in hold time
t
WPREH
0.25
0.25
0.25
t
CK
DQS-in falling edge to CK rising-setup time
t
DSS
0.2
0.2
0.2
t
CK
DQS-in falling edge to CK rising hold time
t
DSH
0.2
0.2
0.2
t
CK
DQS-in high level width
t
DQSH
0.35
0.35
0.35
t
CK
DQS-in low level width
t
DQSL
0.35
0.35
0.35
t
CK
DQS-in cycle time
t
DSC
0.9
1.1
0.9
1.1
0.9
1.1
t
CK
Address and Control Input setup time(fast)
t
IS
0.75
0.9
0.9
ns
6
Address and Control Input hold time(fast)
t
IH
075
0.9
0.9
ns
6
Address and Control Input hold time(slow)
t
IS
0.8
10
1.0
ns
6
Address and Control Input hold time(slow)
t
IH
0.8
1.0
1.0
ns
6
Data-out high impedance time from CK/CK*
t
HZ
-0.7
+0.7
-0.75
+0.75
-0.75
+0.75
ns
Data-out low impedance time from CK/CK*
t
LZ
-0.7
+0.7
-0.75
+0.75
-0.75
+0.75
ns
Input Slew Rate(for input only pins)
t
SL(I)
0.5
0.5
0.5
V/ns
6
相關PDF資料
PDF描述
HDD32M72B9-13B DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM
HDD32M72B9-16B DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM
HDD32M72D9RPW DDR SDRAM Module 256Mbyte (32Mx72bit), based on 32Mx8, 4Banks 8K Ref., 184Pin-DIMM with PLL & Register
HDD32M72D9RPW-10A DDR SDRAM Module 256Mbyte (32Mx72bit), based on 32Mx8, 4Banks 8K Ref., 184Pin-DIMM with PLL & Register
HDD32M72D9RPW-13A DDR SDRAM Module 256Mbyte (32Mx72bit), based on 32Mx8, 4Banks 8K Ref., 184Pin-DIMM with PLL & Register
相關代理商/技術(shù)參數(shù)
參數(shù)描述
HDD32M72B9-13B 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM
HDD32M72B9-16B 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on32Mx8,4Banks, 8K Ref., ECC Unbuffered SO-DIMM
HDD32M72D18RPW 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on 16Mx8, 4Banks, 4K Ref., 184Pin-DIMM with PLL & Register
HDD32M72D9RPW 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on 32Mx8, 4Banks 8K Ref., 184Pin-DIMM with PLL & Register
HDD32M72D9RPW-10A 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:DDR SDRAM Module 256Mbyte (32Mx72bit), based on 32Mx8, 4Banks 8K Ref., 184Pin-DIMM with PLL & Register
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*