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參數(shù)資料
| 型號(hào)： | HD74HC259 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Octal Bus Transceivers With 3-State Outputs 20-LCCC -55 to 125 |
| 中文描述： | 8位可尋址鎖存 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 46K |
| 代理商： | HD74HC259 |
HD74HC259
8-bit Addressable Latch
Description
The HD74HC259 has a single data input (D), 8 latch outputs (Q
0
-Q
7
), 3 address inputs (A, B, and C), a
common enable input (E), and a common clear input. To operate this device as an addressable latch, data is
held on the D input, and the address of the latch into which the data is to be entered is held on the A, B and
C inputs. When enable is taken low the data flows through to the addressed output. The data is stored
when enable transitions from low to high. All unaddressed latches will remain unaffected. With enable in
the high state the device is deselected, and all latches remain in their previous state, unaffected by changes
on the data or address inputs. To eliminate the possibility of entering erroneous data into the latches, the
enable should be held high (inactive) while the address lines are changing.
If enable is held high and clear is taken low all eight latches are cleared to a low state. If enable is low all
latches except the addressed latch will be cleared. The addressed latch will instead follow the D input,
effectively implementing a 3-to-8 line decoder.
Features
High Speed Operation: t
pd
(Data to Output) = 16 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 4 μA max (Ta = 25°C)
Function Table
Inputs
Clear
G
Output of Addressed Latch
Each Other Output
Function
H
L
D
Qio
Addressable latch
H
H
Qio
Qio
Memory
L
L
D
L
8-line demultiplexer
L
H
L
L
Clear
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HD74HC273 | Octal Bus Transceivers With 3-State Outputs 20-CFP -55 to 125 |
| HD74HC279 | Octal Bus Transceivers With 3-State Outputs 20-CDIP -55 to 125 |
| HD74HC27 | Octal Bus Transceivers With 3-State Outputs 20-CDIP -55 to 125 |
| HD74HC280 | Octal Bus Transceivers With 3-State Outputs 20-LCCC -55 to 125 |
| HD74HC283 | Octal Bus Transceivers With 3-State Outputs 20-CDIP -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74HC273FP-E | 制造商:Renesas Electronics Corporation 功能描述:Logic, 74HC series, SOP-20 |
| HD74HC273FPVEL-E | 制造商:Renesas Electronics Corporation 功能描述:Logic, 74HC series, SOP-20 |
| HD74HC279FP(E) | 制造商:Renesas Electronics Corporation 功能描述: |
| HD74HC27FP | 制造商:Renesas Electronics Corporation 功能描述:NOR Gate 3-Element 3-IN CMOS 14-Pin SOP |
| HD74HC27P(E) | 制造商:Renesas Electronics Corporation 功能描述: |
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