參數(shù)資料
型號: HD74HC108
廠商: Hitachi,Ltd.
元件分類: 通用總線功能
英文描述: Synchronous 4-Bit Up/Down Binary Counter 16-CDIP -55 to 125
中文描述: 雙JK觸發(fā)器(帶預(yù)置,共同明確和共同的時鐘)
文件頁數(shù): 1/9頁
文件大?。?/td> 55K
代理商: HD74HC108
HD74HC108
Dual J-K Flip-Flops (with Preset, Common Clear and Common
Clock)
Description
This flip-flop is edge sensitive to the clock input and change state on the negative transition of the clock
pulse. Each flip-flop has independent J, K, and preset inputs and Q and
Q
outputs. Two flip-flops are
controlled by a common clear and a common clock. Preset and clear are independent of the clock and
accomplished by a low logic level on the corresponding input.
Features
High Speed Operation: t
pd
(Clock to Q) = 20 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 2 μA max (Ta = 25°C)
相關(guān)PDF資料
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