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參數(shù)資料
| 型號： | HD74AVC16835 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 18-bit Universal Bus Driver with 3-state Outputs(三態(tài)輸出的18位通用總線驅(qū)動器) |
| 中文描述： | 18位通用總線驅(qū)動器，三態(tài)輸出（三態(tài)輸出的18位通用總線驅(qū)動器） |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 309K |
| 代理商： | HD74AVC16835 |
HD74AVC16835
5
Switching Characteristics (Ta = –40 to 85
°
C)
Switching Characteristics (Ta = –40 to 85
°
C)
Output leak current
Off state output current
Quiescent supply
current
I
off
I
OZ
I
CC
0
3.6
3.6
—
—
—
±
10
±
10
40
μ
A
μ
A
μ
A
V
IN
= 0 or 3.6 V
V
OUT
= V
CC
or GND
V
IN
= V
CC
or GND, I
O
= 0
Item
Maximum
Clock
frequency
Propagatio
n delay
time
Sym-
bol
f
max
V
CC
= 1.2
V
Min
V
CC
= 1.5
±
0.1 V
V
CC
= 1.8
±
0.15 V
V
CC
= 2.5
±
0.2 V
V
CC
= 3.3
±
0.3 V
Unit
MHz
FROM
(Input)
TO
(Output)
Max Min
Max Min
Max Min
Max Min
Max
225
300
300
t
PLH
/
t
PHL
ns
A
LE
CLK
OE
Y
Output
enable
time
Output
disable
time
t
ZH
/ t
ZL
ns
Y
t
HZ
/ t
LZ
ns
OE
Y
Item
Clock
frequency
Setup time t
su
Sym-
bol
f
clock
V
CC
= 1.2
V
Min
V
CC
= 1.5
±
0.1 V
V
CC
= 1.8
±
0.15 V
V
CC
= 2.5
±
0.2 V
V
CC
= 3.3
±
0.3 V
Unit Conditions
MHz
Max Min
Max Min
Max Min
225
Max Min
300
Max
300
ns
Data before CLK
↑
Data
before
LE
↓
CLK
“H”
CLK
“L”
Hold time
t
h
ns
Data after CLK
↑
Data after
LE
↓
CLK
“H” or
“L”
Pulse
width
t
w
ns
LE “H”
CLK “H” or “L”
Item
Symbol
V
CC
(V)
Ta = –40 to 85
°
C
Min
Unit
Test Conditions
Max
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74BC240A | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Octal Buffers/Line Drivers With 3 State Outputs |
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| HD74BC240AFPEL | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Octal Buffers/Line Drivers With 3 State Outputs |
| HD74BC240AP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Octal Buffers/Line Drivers With 3 State Outputs |
| HD74BC240ARP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Buffer/Driver |
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