參數(shù)資料
型號(hào): HD74ALVCH16334
廠商: Hitachi,Ltd.
英文描述: 16-bit Universal Bus Driver with 3-state Outputs(三態(tài)輸出的16位通用總線驅(qū)動(dòng)器)
中文描述: 16位通用總線驅(qū)動(dòng)器,三態(tài)輸出(三態(tài)輸出的16位通用總線驅(qū)動(dòng)器)
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代理商: HD74ALVCH16334
HD74ALVCH16334
16-bit Universal Bus Driver with 3-state Outputs
ADE-205-212 (Z)
Preliminary
1st. Edition
December 1997
Description
This HD74ALVCH16334 is a 16-bit universal bus driver is designed for 2.3 V to 3.6 V V
CC
operation.
Data flow from A to Y is controlled by the output enable (
OE
) input. The device operates in the
transparent mode when the latch enable (
LE
) input is low. When
LE
is high, the A data is latched if the
clock (CLK) input is held at a high or low logic level. If
LE
is high, the A data is stored in the latch/flip
flop on the low to high transition of CLK. When
OE
is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down,
OE
should be tied to V
CC
through a
pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the
driver.
Active bus hold circuitry is provided to hold unused or floating inputs at a valid logic level.
Features
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25°C)
High output current ±24 mA (@V
CC
= 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HD74ALVCH16373 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:16-bit Transparent D-type Latches with 3-state Outputs
HD74ALVCH16374 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:16-bit D-type Flip Flops with 3-state Outputs
HD74ALVCH16500 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:18-bit Universal Bus Transceivers with 3-state Outputs
HD74ALVCH16501 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:18-bit Universal Bus Transceivers with 3-state Outputs
HD74ALVCH16543 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:16-bit Registered Transceivers with 3-state Outputs