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參數(shù)資料
| 型號： | HD74ALVC16835 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 18-bit Universal Bus Driver with 3-state Outputs |
| 中文描述： | 18位通用總線驅(qū)動器，三態(tài)輸出 |
| 文件頁數(shù)： | 1/15頁 |
| 文件大小： | 63K |
| 代理商： | HD74ALVC16835 |
HD74ALVC16835
18-bit Universal Bus Driver with 3-state Outputs
ADE-205-192E (Z)
Preliminary
6th. Edition
January 1999
Description
The HD74ALVC16835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V V
CC
operation.
Data flow from A to Y is controlled by output enable (
OE
). The device operates in the transparent mode
when the latch enable (LE) input is high. The A data is latched if the clock (CLK) input is held at a high or
low logic level. If LE is low, the A data is stored in the latch/flip flop on the low to high transition of the
CLK. When
OE
is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down,
OE
should be tied to V
CC
through a
pullup registor; the minimum value of the registor is determined by the current sinking capability of the
driver.
Features
Meets “PC SDRAM registered DIMM design support document, Rev. 1.2”
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25
°
C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25
°
C)
High output current
±
24 mA (@V
CC
= 3.0 V)
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| HD74ALVC1G80 | Single Positive Edge-triggered D-type Flip Flop |
| HD74ALVC1G07 | Single Buffer / Driver with Open Drain |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74ALVC16835TE | 制造商:Renesas Electronics Corporation 功能描述:BUS XCVR SGL 18CH 3-ST 56TSSOP - Tape and Reel |
| HD74ALVC16835TEL | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:18-bit Universal Bus Driver with 3-state Outputs |
| HD74ALVC16836 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:20-bit Universal Bus Driver with 3-state Outputs |
| HD74ALVC1G00 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| HD74ALVC1G00VSE | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:2-input NAND Gate |
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