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參數(shù)資料
| 型號(hào)： | HD66727A04TA0L |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function |
| 中文描述： | 低功耗點(diǎn)陣液晶顯示控制器/鍵掃描功能驅(qū)動(dòng)程序 |
| 文件頁數(shù)： | 91/97頁 |
| 文件大?。?/td> | 513K |
| 代理商： | HD66727A04TA0L |
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HD66727
91
Electrical Characteristics Notes
1. All voltage values are referred to GND = 0V. If the LSI is used above the absolute maximum ratings, it
may become permanently damaged. Using the LSI within the given electrical characteristic is strongly
recommended to ensure normal operation. If these electrical characteristic are exceeded, the LSI may
malfunction or exhibit poor reliability.
2. V
CC
> V1
≥
V2
≥
V3
≥
V4
≥
V5 > V
EE
must be maintained.
3. For bare die products, specified at 75
°
C.
4. For bare die products, specified by the common die shipment specification.
5. The following four circuits are I/O pin configurations except for liquid crystal display output (Figure
51).
Pins: SCL, ID1/CS*, ID0,
OSC1, OPOFF, IM,
EXM, TEST
Pins: KST7 to KST0, IRQ*
LED2 to LED0, PORT2 to PORT0
PMOS
NMOS
V
CC
GND
Pins: KIN3 to KIN0, RESET*
Pin: SDA
(Pull-up MOS)
NMOS
PMOS
V
CC
PMOS
V
CC
GND
PMOS
NMOS
V
CC
GND
NMOS
PMOS
V
CC
(Pull-up MOS)
V
CC
V
CC
PMOS
NMOS
(Tri-state output circuit)
Output data
Output enable
GND
PMOS
IM
(Input circuit)
Figure 51 I/O Pin Configurations
6. The TEST pin must be grounded and the ID1 and ID0, IM, EXM, and OPOFF pins must be grounded or
connected to V
CC
.
7. Corresponds to the high output for clock-synchronized serial interface.
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