參數(shù)資料
型號: HD66726
廠商: Hitachi,Ltd.
英文描述: Graphics LCD Controller/Driver with Key Scan Function(帶鍵掃描功能的圖形LCD控制器/驅(qū)動器)
中文描述: 圖形液晶顯示控制器/鍵掃描功能(帶鍵掃描功能的圖形液晶顯示控制器/驅(qū)動器驅(qū)動程序)
文件頁數(shù): 16/117頁
文件大小: 1549K
代理商: HD66726
HD66726
16
Block Function Description
System Interface
The HD66726 has five types of system interfaces, and a clock-synchronized serial, a 68-system 4-bit/8-bit
bus, and a 80-system 4-bit/8-bit bus. The interface mode is selected by the IM2-0 pins. The key scan of the
HD66726 is not available for the 4-bit/8-bit bus interface. Instead, use the clock-synchronized serial
interface.
The HD66726 has two 8-bit registers: an instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as clear display, display control, and address information for the
display data RAM (DDRAM), character generator RAM (CGRAM), and segment RAM (SEGRAM).
The DR temporarily stores data to be written into the DDRAM, CGRAM, or SEGRAM. Data written into
the DR from the MPU is automatically written into the DDRAM, CGRAM, or SEGRAM by internal
operation. When address information is written into the IR, data is read and then stored in the DR from
DDRAM, CGRAM, or SEGRAM by internal operation. Data is read through the DR when reading from
the RAM, and the first read data is invalid and the second and the following data are normal. After reading,
data in DDRAM, CGRAM, or SEGRAM at the next address is sent to the DR for the next reading from the
MPU.
Execution time for instruction excluding clear display is 0 clock cycle and instructions can be written in
succession.
Table 3
Register Selection by RS and R/W Bits
R/W Bits
RS Bits
Operations
0
0
IR write as an internal operation
1
0
Read key scan data (SCAN0-3)
0
1
DR write as an internal operation (DR to DDRAM, CGRAM, or SEGRAM)
1
1
DR read as an internal operation (DDRAM, CGRAM, or SEGRAM to DR)
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