參數(shù)資料
型號(hào): HD66503
廠商: Hitachi,Ltd.
英文描述: 240-Channel Common Driver with Internal LCD Timing Circuit(帶內(nèi)部LCD定時(shí)電路的240通道驅(qū)動(dòng)器)
中文描述: 240頻道共同的內(nèi)部LCD定時(shí)電路(帶內(nèi)部液晶定時(shí)電路的240通道驅(qū)動(dòng)器驅(qū)動(dòng)程序)
文件頁數(shù): 9/28頁
文件大?。?/td> 107K
代理商: HD66503
HD66503
9
1. CR Oscillator:
The CR oscillator generates the HD66503 operation clock. During master mode, since
the operation clock is needed, connect oscillation resistor R
f
with oscillation capacitor C
f
as follows. When
the external clock is used, input external clock to pin CR and open pins C and R (Figure 4).
When using the HD66503 during slave mode, the operation clock will not be needed; therefore, connect pin
CR to V
CC
and open pins C and R (Figure 5).
2. Liquid Crystal Timing Generator:
The liquid crystal timing generator creates various signals for the
LCD. During master mode (M/
S
= V
CC
), the generator operates the HD66503’s internal circuitry as a
common internal driver using the generated LCD signals. In addition, signals CL1, M, and
DOC
created by
this generator can synchronously display data on a liquid crystal display by inputting them into the RAM-
provided segment driver HD66520 used together with HD66503. During slave mode (M/
S
= GND), this
generator stops; the slave HD66503 operates based on signals CL1, M,
DOC
, and FLM generated by the
master HD66503.
3. M/
S
Switcher:
Controls the input and output of LCD signals CL1, FLM, M, and
DOC
.
This circuit outputs data when M/
S
= V
CC
(master mode) and inputs data when M/
S
= GND (slave mode).
4. Alternating Signal Generator:
Generates the alternating signal for the liquid crystal display. Since the
alternating signal decreases cross talk, it can alternate among 2 to 63 lines. The number of lines are
specified with pins MWS0 to MWS5 is set to either V
CC
or GND.
Moreover, the alternating signal can be externally input by grounding pins MWS0 to MWS5. In this case,
the alternating signal is input from pin M.
CR
R
f
R
C
C
OPEN
R
CR
External clock
OPEN
C
f
Figure 4 Oscillator Connection in Master Mode
CR
OPEN
R
C
OPEN
V
CC
Figure 5 Oscillator Connection in Slave Mode
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