
60
Table 3.2
Interrupt Sources and Their Priorities
Interrupt Source
RES
IRQ
0
IRQ
1
IRQAEC
WKP
0
WKP
1
WKP
2
WKP
3
WKP
4
WKP
5
WKP
6
WKP
7
Timer A
Asynchronous
event counter
Timer FL
Interrupt
Reset
IRQ
0
IRQ
1
IRQAEC
WKP
0
WKP
1
WKP
2
WKP
3
WKP
4
WKP
5
WKP
6
WKP
7
Timer A overflow
Asynchronous event
counter overflow
Timer FL compare match
Timer FL overflow
Timer FH compare match
Timer FH overflow
SCI3 transmit end
SCI3 transmit data empty
SCI3 receive data full
SCI3 overrun error
SCI3 framing error
SCI3 parity error
A/D conversion end
Direct transfer
Vector Number
0
4
5
6
9
Vector Address
H'0000 to H'0001
H'0008 to H'0009
H'000A to H'000B
H'000C to H'000D
H'0012 to H'0013
Priority
High
11
12
H'0016 to H'0017
H'0018 to H'0019
14
H'001C to H'001D
Timer FH
15
H'001E to H'001F
SCI3
18
H'0024 to H'0025
A/D
(SLEEP instruction
executed)
Note:
Vector addresses H'0002 to H'0007, H'000E to H'0011, H'0014 to H'0015, H'001A to
H'001B, and H'0020 to H'0023 are reserved and cannot be used.
19
20
H'0026 to H'0027
H'0028 to H'0029
Low