
Table 1-1   Features (cont)
Feature
Serial com-
munication
interface (SCI)
(2 channels)
A/D converter 
Description
 Asynchronous or synchronous mode (selectable)
 Full duplex:  can send and receive simultaneously 
 Built-in baud rate generator
 10-Bit resolution
 8 channels, controllable in single mode or scan mode (selectable)
 Sample-and-hold function
 Start of A/D conversion can be externally triggered
 57 Input/output pins (six 8-bit ports, one 5-bit port, one 4-bit port)
 8 Input-only pins (one 8-bit port)
 7 external interrupt pins (NMI, IRQ0, IRQ1 to IRQ5)
 23 internal interrupts
 8 priority levels
Performs bidirectional data transfer between memory and I/O independently
controller (DTC) of the CPU
Wait-state 
Can insert wait states in access to external memory or I/O
controller (WSC)
Operating 
5 MCU operating modes
modes
 Expanded minimum modes, supporting up to 64 kbytes external memory
with or without using on-chip ROM (Modes 1 and 2)
 Expanded maximum modes, supporting up to 1 Mbyte external memory
with or without using on-chip ROM (Modes 3 and 4)
 Single-chip mode (Mode 7)
3 power-down modes
 Sleep mode
 Software standby mode
 Hardware standby mode
Other features
 E clock output available
 Clock generator on-chip
I/O ports
Interrupt 
controller
(INTC)
Data transfer 
Model Name
HD6475348RCG
HD6475348RCP
HD6475348RF
HD6435348RCP
HD6435348RF
Package Options
84-Pin windowed LCC (CG-84)
84-Pin PLCC (CP-84)
80-Pin QFP (FP-80A)
84-Pin PLCC (CP-84)
80-Pin QFP (FP-80A)
ROM
PROM
Mask
ROM
Model Name
HD6475348SCG
HD6475348SCP
HD6475348SF
HD6475348STF
HD6435348SCP
HD6435348SF
HD6435348STF
Package Options
84-Pin windowed LCC (CG-84)
84-Pin PLCC (CP-84)
80-Pin QFP (FP-80A)
80-Pin TQFP (TFP-80C)
84-Pin PLCC (CP-84)
80-Pin QFP (FP-80A)
80-Pin TQFP (TFP-80C)
ROM
PROM
Mask
ROM
Product
line-up
(H8/534
R-mask
versions)
Product
line-up
(H8/534
S-mask
versions)
3