![](http://datasheet.mmic.net.cn/280000/HD6413308_datasheet_16064968/HD6413308_140.png)
6.1.3 Input and Output Pins
Table 6-1 lists the input and output pins of the free-running timer module.
Table 6-1. Input and Output Pins of Free-Running Timer Module
6.1.4 Register Configuration
Table 6-2 lists the registers of the free-running timer module.
Table 6-2. Register Configuration
Notes:
*
1
Software can write a “0” to clear bits 7 to 1, but cannot write a “1” in these bits.
*
2
OCRA and OCRB share the same addresses. Access is controlled by the OCRS bit in TOCR.
Name
Counter clock input
Abbreviation
FTCI
I/O
Input
Function
Input of external free-running counter clock
signal
Output controlled by comparator A
Output controlled by comparator B
Trigger for capturing current count into input
capture register A
Trigger for capturing current count into input
capture register B
Trigger for capturing current count into input
capture register C
Trigger for capturing current count into input
capture register D
Output compare A
Output compare B
Input capture A
FTOA
FTOB
FTIA
Output
Output
Input
Input capture B
FTIB
Input
Input capture C
FTIC
Input
Input capture D
FTID
Input
Initial
Address
H’FF90
H’FF91
H’FF92
H’FF93
H’FF94
H’FF95
H’FF96
H’FF97
H’FF98
H’FF99
Name
Timer interrupt enable register
Timer control/status register
Free-running counter (High)
Free-running counter (Low)
Output compare register A/B (High)*
2
Output compare register A/B (Low)*
2
Timer control register
Timer output compare control register
Input capture register A (High)
Input capture register A (Low)
Abbreviation
TIER
TCSR
FRC (H)
FRC (L)
OCRA/B (H)
OCRA/B (L)
TCR
TOCR
ICRA (H)
ICRA (L)
R/W
R/W
R/(W)*
1
R/W
R/W
R/W
R/W
R/W
R/W
R
R
value
H’01
H’00
H’00
H’00
H’FF
H’FF
H’00
H’E0
H’00
H’00
125