
HD61604/HD61605
1289
How to Input Data into HD61605
Input data is composed of 4 bits
×
4 bytes. Take care that the data transfer is not interrupted because the
first 4-bit data to the fourth 4-bit data are distinguished from each other by the sequence only.
When data transfer is interrupted, or at power on, the following two methods can be used to reset the
count of the number of data (count of the first 4-bit data to the fourth 4-bit data):
1. Set
&6
and
5(
to low (no display data changes).
2. Input 4 or more 1-byte instruction data (4-bit data) whose bit 3 and 2 are high (display data may
change).
The data input method via data input pins (
&6
,
:(
, D0 to D3) is similar to that of static RAM such as
HM6116. Access to the LSI can be made through the same bus line as ROM and RAM. When output
ports of a microprocessor are used for access, refer to the timing specifications and Figure 19.
Power on
CS
WE
RE
READY
SYNC
SB
D0–D3
*
6
*
6
*
1
*
4
*
5
*
3
*
2
*
5
*
5
Mode setting data
Mode setting data
Display data
1st 2nd 3rd
4th
1st
2nd 3rd
4th
1st 2nd 3rd
4th
Notes: 1.
2.
3.
4.
5.
6.
7.
READY output is indefinite during 12 clocks after the oscillation starts at power on (clock:
OSC2 clock).
High pulse should be applied to SYNC pin when using two or more chips simultaneously.
In the mode in which READY is always available, READY output is indefinite while high is
being applied to SYNC.
Reset the 4-bit data counter after power on.
READY output period is within 3.5 clocks in the mode setting operation and bit
manipulation or within 10.5 clocks when the display data (8 bits) is updated.
Connect a pull-up resistor if WE or RE is floating.
It is not always necessary to follow this example.
Figure 19 Example of Data Transfer Sequence