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參數(shù)資料
| 型號： | HD49315AF |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | CMOS 10-Bit A/D Converter(CMOS 10位A/D轉(zhuǎn)換器) |
| 中文描述： | 的CMOS 10位A / D轉(zhuǎn)換器的CMOS（10位的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 78K |
| 代理商： | HD49315AF |
HD49315AF
8
Electrical Characteristics
(Unless otherwise specified, Ta = 25
°
DDH
= 4.75 V,
AV
DDL
= 3.3 V, DV
DDL
= 3.3 V, V
RT
= 4.0 V, V
RB
= 2.0 V, R
EXT
= 39 k
) (cont)
Item
Symbol
Min
Typ
Max
Units
Test conditions
Differentiation
DNL +*
8
0
+0.5
+0.8
LSB
f
CLK
= 15 MHz
linearity error
DNL –*
8
–0.8
–0.5
—
LSB
Digital output
I
OZH
I
OZL
V
OH
V
OL
—
—
50
μ
A
μ
A
V
STBY
= V
DDL
, V
OUT
= V
DDL
V
STBY
= V
DDL
, V
OUT
= 0 V
I
OH
= –2 mA
I
OL
= 2 mA
current
–50
—
—
Digital output
DV
DDL
– 0.5 —
—
—
V
voltage
Notes: 1. I
DDH
, I
STBYH
is Quiescent of AV
DDH
2. I
DDL
, I
STBYL
is Quiescent of A
VDDL
+ DV
DDL
3. V
INp-p
= V
IN(1022
→
1023)
– V
IN(0
→
1)
V
IN(1022
→
1023)
:Input voltage when the output code of A/D converter change from 1022 to 1023.
V
IN(0
→
1)
:
Input voltage when the output code of A/D converter change from 0 to 1.
4. The offset voltage (E
) is the difference between V
and the input voltage at which the output
code changes from 0 to 1 (V
IN(0
→
1)
). The offset is positive if V
IN(0
→
1)
is higher than V
RB
, and negative
if V
IN(0
→
1)
is lower than V
RB
.
E
OB
= V
IN(0
→
1)
– V
RB
The offset voltage (E
OB
) has V
DDL
(AV
DDL
, DV
DDL
) dependence. (+50 mV/V)
5. I
IN
is not transition current, but static current.
6. Reference value
7.
Conversion clock
1.4V
×
DV
DDL
3.3V
—
0.5
V
t
WH
t
WL
8. DNL calculate the difference of linearity error between next two codes.
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