參數(shù)資料
型號(hào): HD4048412FS
廠商: Hitachi,Ltd.
英文描述: 4-Bit Single-Chip Microcomputer
中文描述: 4位單片機(jī)
文件頁(yè)數(shù): 96/125頁(yè)
文件大?。?/td> 471K
代理商: HD4048412FS
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)當(dāng)前第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)
HD404849 Series
96
Bit
Initial value
Read/Write
Bit name
3
0
R/W
RAME
2
0
R/W
IAOF
0
0
R/W
ICSF
1
0
R/W
ICEF
A/D current off flag (IAOF: $021, bit 2)
1
0
Refer to description of operating modes
RAME
Refer to description of timers
ICEF
Refer to description of timers
ICSF
IAOF (A/D current off flag)
Current I is cut off.
Current I flows.
Figure 83 A/D Current Off Flag (IAOF)
Note on Use:
Use the SEM and SEMD instructions to write data to the A/D start flag (ADSF: $020, bit 2),
but make sure that the A/D start flag is not written to during A/D conversion. Data read from the A/D data
register (ADRL: $017, ADRU: $018) during A/D conversion cannot be guaranteed.
The A/D converter does not operate in the stop, watch, and subactive modes because it relies on the clock
from OSC, which is stopped in these modes. During these low-power dissipation modes, current through
the resistor ladder is cut off to decrease the power input.
The port data register (PDR) is initialized to 1 by an MCU reset. At this time, if pull-up MOS is selected as
active by bit 3 of the miscellaneous register (MIS3), the port will be pulled up to V
CC
. When using a shared
R port/analog input pin as an input pin, clear PDR to 0. Otherwise, if pull-up MOS is selected by MIS3 and
PDR is set to 1, a pin selected by bit 1 of the A/D mode register as an analog pin will remain pulled up.
相關(guān)PDF資料
PDF描述
HD4048412H RELAY BASE
HD4048412TF 4-Bit Single-Chip Microcomputer
HD404848 4-Bit Single-Chip Microcomputer
HD404848FS 4-Bit Single-Chip Microcomputer
HD404848H RELAY SOCKET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HD4048412H 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD4048412TF 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-Bit Single-Chip Microcomputer
HD404848 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD404848FS 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD404848H 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer