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參數(shù)資料
| 型號： | HCTS112KMSR |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Radiation Hardened Dual JK Flip-Flop |
| 中文描述： | HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16 |
| 文件頁數(shù)： | 9/10頁 |
| 文件大小： | 180K |
| 代理商： | HCTS112KMSR |
498
HCTS112MS
Die Characteristics
DIE DIMENSIONS:
89 x 88 mils
2.25 x 2.24mm
METALLIZATION:
Type: SiAl
Metal Thickness: 11k
±
1k
GLASSIVATION:
Type: SiO
2
Thickness: 13k
±
2.6k
WORST CASE CURRENT DENSITY:
<2.0 x 10
5
A/cm
2
BOND PAD SIZE:
100
μ
m x 100
μ
m
4 mils x 4 mils
Metallization Mask Layout
HCTS112MS
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location.
The mask series for the HCTS112 is TA14441A.
CP1
(1)
K1
(2)
J1 (3)
S1 (4)
Q1 (5)
Q1 (6)
Q2 (7)
GND
(8)
Q2
(9)
S2
(10)
(11) J2
(12) K2
(13) CP2
(14) R2
(15) R1
VCC
(16)
Spec Number
518603
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCTS112MS | Radiation Hardened Dual JK Flip-Flop |
| HCTS112HMSR | Radiation Hardened Dual JK Flip-Flop |
| HCTS11MS | Quadruple 2-Input Positive-NAND Gate 20-LCCC -55 to 125 |
| HCTS160KMSR | Radiation Hardened Synchronous Counter |
| HCTS160MS | Radiation Hardened Synchronous Counter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCTS112MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual JK Flip-Flop |
| HCTS11MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Triple 3-Input AND Gate |
| HCTS132D | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input NAND Schmitt Trigger |
| HCTS132DMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input NAND Schmitt Trigger |
| HCTS132HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input NAND Schmitt Trigger |
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