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參數(shù)資料
| 型號： | HCT4067 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 16-channel analog multiplexer/demultiplexer |
| 中文描述： | 16通道模擬多路復(fù)用器/解復(fù)用器 |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 129K |
| 代理商： | HCT4067 |
September 1993
2
Philips Semiconductors
Product specification
16-channel analog
multiplexer/demultiplexer
74HC/HCT4067
FEATURES
Low “ON” resistance:
80
(typ.) at V
CC
= 4.5 V
70
(typ.) at V
CC
= 6.0 V
60
(typ.) at V
CC
= 9.0 V
typical “break before make” built-in
Output capability: non-standard
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4067 are high-speed Si-gate CMOS
devices and are pin compatible with the “4067” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT4067 are 16-channel analog
multiplexers/demultiplexers with four address inputs (S
0
to
S
3
) , an active LOW enable input (E), sixteen independent
inputs/outputs (Y
0
to Y
15
) and a common input/output (Z).
The ”4067” contains sixteen bidirectional analog switches,
each with one side connected to an independent
input/output (Y
0
to Y
15
) and the other side connected to a
common input/output (Z).
With E LOW, one of the sixteen switches is selected (low
impedance ON-state) by S
0
to S
3
. All unselected switches
are in the high impedance OFF-state. With E HIGH, all
switches are in the high impedance OFF-state,
independent of S
0
to S
3
.
The analog inputs/outputs (Y
0
to Y
15
, and Z) can swing
between V
CC
as a positive limit and GND as a negative
limit. V
CC
to GND may not exceed 10 V.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑ {
(C
L
+
C
S
)
×
V
CC2
×
f
o
} where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
{(C
L
+
C
S
)
×
V
CC2
×
f
o
} = sum of outputs
C
L
= output load capacitance in pF
C
S
= max. switch capacitance in pF
V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PZL
/ t
PZH
turn-on time
E to V
os
S
n
to V
os
turn-off time
os
S
n
to V
os
input capacitance
power dissipation capacitance per switch
max. switch capacitance
independent (Y)
common (Z)
C
L
= 15 pF; R
L
= 1 k
; V
CC
= 5 V
26
29
32
33
ns
ns
t
PLZ
/ t
PHZ
27
29
3.5
29
26
30
3.5
29
ns
ns
pF
pF
C
I
C
PD
C
S
notes 1 and 2
5
45
5
45
pF
pF
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