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參數(shù)資料
| 型號(hào)： | HCF4724B |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8 Bit Addressable Latch(8位可尋址鎖存器) |
| 中文描述： | 8位可尋址鎖存器（8位可尋址鎖存器） |
| 文件頁(yè)數(shù)： | 5/14頁(yè) |
| 文件大?。?/td> | 302K |
| 代理商： | HCF4724B |
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DYNAMIC ELECTRICAL CHARACTERISTICS
(T
amb
= 25
o
C, C
L
= 50 pF, R
L
= 200 K
,
typical temperature coefficent for all V
DD
values is 03 %/
o
C, all input rise and fall times= 20 ns)
Symbol
Parameter
Test Conditions
Value
Typ.
200
75
50
200
80
60
175
80
65
225
100
75
100
50
40
100
50
40
200
100
65
75
40
25
50
25
20
75
40
25
5
Unit
V
DD
(V)
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
Any
Input
Min.
Max.
400
150
100
400
160
120
350
160
130
450
200
150
200
100
80
200
100
80
400
200
125
150
75
50
100
50
35
150
75
50
7.5
t
PLH
t
PHL
Propagation Delay Time
Data to Output
(See Figure 1)
ns
t
PLH
t
PHL
Propagation Delay Time
Write Disable to Output
(See Figure 1)
ns
t
PHL
Propagation Delay Time
Reset to Output
(See Figure 1)
ns
t
PLH
t
PHL
Propagation Delay Time
Address to Output
(See Figure 1)
ns
t
TLH
t
THL
Transition Time Any Output
ns
t
W
Minimum Pulse Width
Data
(See Figure 1)
ns
Minimum Pulse Width
Address
(See Figure 1)
ns
Minimum Pulse Width
Reset
(See Figure 1)
ns
t
s
Minimum Setup Time
Data to Write Disable
(See Figure 1)
ns
t
H
Minimum Holf Time
Data to Write Disable
(See Figure 1)
ns
C
IN
Input Capacitance
pF
HCC/HCF4724B
5/14
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