參數(shù)資料
型號(hào): HCF4516BM1
廠商: 意法半導(dǎo)體
元件分類: 通用總線功能
英文描述: PRESETTABLE UP/DOWN COUNTERS
中文描述: 預(yù)置向上/向下計(jì)數(shù)器
文件頁數(shù): 6/12頁
文件大小: 136K
代理商: HCF4516BM1
DYNAMIC ELECTRICAL CHARACTERISTICS
(T
amb
= 25
o
C, C
L
=50 pF, R
L
= 200K
,
typicaltemperaturecoefficentforall V
DD
valuesis 03%/
o
C, all inputrise andfall times= 20 ns)
Symbol
Parameter
Test Conditions
Value
Typ.
Unit
V
DD
(V)
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
5
10
15
Min.
Max.
t
PHL
t
PLH
Propagation Delay Time Clock to Q Output
200
100
75
210
105
80
240
120
90
125
60
50
320
160
125
100
50
40
4
8
11
400
200
150
420
210
160
480
240
180
250
120
100
640
320
250
200
100
80
ns
t
PHL
t
PLH
Propagation Delay Time Preset or Reset to
Q Output
ns
t
PHL
t
PLH
Propagation Delay Time Clock to Carry Out
ns
t
PHL
t
PLH
Propagation Delay Time Carry In to Carry
Out
ns
t
PHL
t
PLH
Propagation Delay Time Preset or Reset to
Carry Out
ns
t
THL
t
TLH
Transition Time
ns
f
MAX
Max Clock Frequency
2
4
MHz
5.5
150
75
60
150
80
60
t
W
Clock Pulse Width
ns
Preset Enable or Reset Removal Time (1)
ns
t
r
, t
f
Clock Rise and Fall Time (2)
15
5
5
μ
s
t
setup
Carry In Setup Time
130
60
45
360
160
110
220
100
75
ns
t
setup
Up Down Setup Time
ns
t
W
Preset Enable or Reset Pulse Width
ns
(1)Timerequired afterthefallingedgeofthereset orpreset enableinutsbefore therisingedge oftheclock willtriggerthecounter (similartosetup time).
(2)Ifmorethanunitis cascated intheparallelclocked application, trCLshould bemadelessthan orequal tothesumofthefixedpropagation delayat
15pFandthetransitiontimeofthecarry outputdrivingstage oftheestimatedcapacitive load.
HCF4510B/4515B
6/12
相關(guān)PDF資料
PDF描述
HCF4516BM013TR PRESETTABLE UP/DOWN COUNTERS
HCF4521 24 STAGE FREQUENCY DIVIDER
HCF4521B Octal Buffers/Drivers With 3-State Outputs 20-LCCC -55 to 125
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HCF4521BM1 Octal Buffers/Drivers With 3-State Outputs 20-CFP -55 to 125
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